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authorLi Yang <leoli@freescale.com>2008-03-06 18:42:35 +0800
committerKumar Gala <galak@kernel.crashing.org>2008-03-07 08:42:22 -0600
commitd7f46190ef1048e48f71c8a7a60c2881c437d08d (patch)
tree8c8a46149ea05cf897768c6776223eddaf7a7620 /arch/powerpc/boot
parent28b958859206b7010d03129611c2e444898e3ee4 (diff)
[POWERPC] 83xx: Add local bus device nodes to MPC837xMDS device trees.
Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts66
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts66
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts66
3 files changed, 198 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 677a0615eb00..49c05e97386c 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -47,6 +47,72 @@
reg = <0x00000000 0x20000000>; // 512MB at 0
};
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ // booting from NOR flash
+ ranges = <0 0x0 0xfe000000 0x02000000
+ 1 0x0 0xf8000000 0x00008000
+ 3 0x0 0xe0600000 0x00008000>;
+
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0 0x0 0x2000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ fs@100000 {
+ reg = <0x100000 0x800000>;
+ };
+
+ kernel@1d00000 {
+ reg = <0x1d00000 0x200000>;
+ };
+
+ dtb@1f00000 {
+ reg = <0x1f00000 0x100000>;
+ };
+ };
+
+ bcsr@1,0 {
+ reg = <1 0x0 0x8000>;
+ compatible = "fsl,mpc837xmds-bcsr";
+ };
+
+ nand@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8377-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <3 0x0 0x8000>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ kernel@100000 {
+ reg = <0x100000 0x300000>;
+ };
+
+ fs@400000 {
+ reg = <0x400000 0x1c00000>;
+ };
+ };
+ };
+
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 3f9e9fe4b5aa..1d6ea080ad73 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -47,6 +47,72 @@
reg = <0x00000000 0x20000000>; // 512MB at 0
};
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ // booting from NOR flash
+ ranges = <0 0x0 0xfe000000 0x02000000
+ 1 0x0 0xf8000000 0x00008000
+ 3 0x0 0xe0600000 0x00008000>;
+
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0 0x0 0x2000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ fs@100000 {
+ reg = <0x100000 0x800000>;
+ };
+
+ kernel@1d00000 {
+ reg = <0x1d00000 0x200000>;
+ };
+
+ dtb@1f00000 {
+ reg = <0x1f00000 0x100000>;
+ };
+ };
+
+ bcsr@1,0 {
+ reg = <1 0x0 0x8000>;
+ compatible = "fsl,mpc837xmds-bcsr";
+ };
+
+ nand@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8378-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <3 0x0 0x8000>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ kernel@100000 {
+ reg = <0x100000 0x300000>;
+ };
+
+ fs@400000 {
+ reg = <0x400000 0x1c00000>;
+ };
+ };
+ };
+
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 36c1c13f0517..fdb4a9255b24 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -47,6 +47,72 @@
reg = <0x00000000 0x20000000>; // 512MB at 0
};
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ // booting from NOR flash
+ ranges = <0 0x0 0xfe000000 0x02000000
+ 1 0x0 0xf8000000 0x00008000
+ 3 0x0 0xe0600000 0x00008000>;
+
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0 0x0 0x2000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ fs@100000 {
+ reg = <0x100000 0x800000>;
+ };
+
+ kernel@1d00000 {
+ reg = <0x1d00000 0x200000>;
+ };
+
+ dtb@1f00000 {
+ reg = <0x1f00000 0x100000>;
+ };
+ };
+
+ bcsr@1,0 {
+ reg = <1 0x0 0x8000>;
+ compatible = "fsl,mpc837xmds-bcsr";
+ };
+
+ nand@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8379-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <3 0x0 0x8000>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ kernel@100000 {
+ reg = <0x100000 0x300000>;
+ };
+
+ fs@400000 {
+ reg = <0x400000 0x1c00000>;
+ };
+ };
+ };
+
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;