diff options
| author | Timur Tabi <timur@freescale.com> | 2008-01-18 09:24:53 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-01-23 19:34:29 -0600 |
| commit | c7d24a2dd02b9fe736e13931ee3e4a1f4f89cb47 (patch) | |
| tree | f9611529b41ccf9c595aa762ad3b79f5018225ff /arch/powerpc/boot | |
| parent | b0bbad60680a5e76067eb1e55c3676b28abe7481 (diff) | |
[POWERPC] Update MPC8610 HPCD to support audio drivers
Update the MPC8610 HPCD files to support the audio driver. Update
booting-without-of.txt with information on the SSI device.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
| -rw-r--r-- | arch/powerpc/boot/dts/mpc8610_hpcd.dts | 113 |
1 files changed, 112 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index 01040a752c82..d98715cbda28 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts @@ -1,7 +1,7 @@ /* * MPC8610 HPCD Device Tree Source * - * Copyright 2007 Freescale Semiconductor Inc. + * Copyright 2007-2008 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License Version 2 as published @@ -49,6 +49,7 @@ #size-cells = <1>; #interrupt-cells = <2>; device_type = "soc"; + compatible = "fsl,mpc8610-immr", "simple-bus"; ranges = <0 e0000000 00100000>; reg = <e0000000 1000>; bus-frequency = <0>; @@ -62,6 +63,13 @@ interrupts = <2b 2>; interrupt-parent = <&mpic>; dfsrr; + + cs4270:codec@4f { + compatible = "cirrus,cs4270"; + reg = <4f>; + /* MCLK source is a stand-alone oscillator */ + clock-frequency = <bb8000>; + }; }; i2c@3100 { @@ -111,6 +119,109 @@ reg = <e0000 1000>; fsl,has-rstcr; }; + + i2s@16000 { + compatible = "fsl,mpc8610-ssi"; + cell-index = <0>; + reg = <16000 100>; + interrupt-parent = <&mpic>; + interrupts = <3e 2>; + fsl,mode = "i2s-slave"; + codec-handle = <&cs4270>; + }; + + ssi@16100 { + compatible = "fsl,mpc8610-ssi"; + cell-index = <1>; + reg = <16100 100>; + interrupt-parent = <&mpic>; + interrupts = <3f 2>; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; + cell-index = <0>; + reg = <21300 4>; /* DMA general status register */ + ranges = <0 21100 200>; + + dma-channel@0 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <0>; + reg = <0 80>; + interrupt-parent = <&mpic>; + interrupts = <14 2>; + }; + dma-channel@1 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <1>; + reg = <80 80>; + interrupt-parent = <&mpic>; + interrupts = <15 2>; + }; + dma-channel@2 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <2>; + reg = <100 80>; + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + dma-channel@3 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <3>; + reg = <180 80>; + interrupt-parent = <&mpic>; + interrupts = <17 2>; + }; + }; + + dma@c300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma"; + cell-index = <1>; + reg = <c300 4>; /* DMA general status register */ + ranges = <0 c100 200>; + + dma-channel@0 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <0>; + reg = <0 80>; + interrupt-parent = <&mpic>; + interrupts = <3c 2>; + }; + dma-channel@1 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <1>; + reg = <80 80>; + interrupt-parent = <&mpic>; + interrupts = <3d 2>; + }; + dma-channel@2 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <2>; + reg = <100 80>; + interrupt-parent = <&mpic>; + interrupts = <3e 2>; + }; + dma-channel@3 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <3>; + reg = <180 80>; + interrupt-parent = <&mpic>; + interrupts = <3f 2>; + }; + }; + }; pci0: pci@e0008000 { |