diff options
| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2013-02-08 17:07:31 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2014-09-08 11:38:41 -0500 |
| commit | 4664d4d86012c4a51b9f40d0d72e27e39205e874 (patch) | |
| tree | 1f7a7a8e296dc06a22a474409c24c5be6466389c /arch/openrisc/kernel | |
| parent | d2136bce9db79f7d983f081c5d1b6e9359714dd6 (diff) | |
ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default
Enables MPUSS ES2 power management mode using ES2_PM_MODE in
AMBA_IF_MODE register.
0x0: OMAP5 ES1 behavior, CPU cores would enter and exit OFF mode together.
Broken! Fortunately, we do not support this anymore.
0x1: OMAP5 ES2, DRA7 behavior, CPU cores are allowed to enter/exit OFF mode
independently.
This is one time settings thanks to always ON domain.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor conflict resolutions, consolidation for DRA7]
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/openrisc/kernel')
0 files changed, 0 insertions, 0 deletions