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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2018-03-23 09:29:06 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2018-03-23 14:16:58 +1100
commit80a4ae202f2d319eced8bbf612a4e8b0f11c21f5 (patch)
treeefc1aff78cc26e978b06ab6fb11a919dabc2156b /arch/mn10300/unit-asb2305/unit-init.c
parentaff6f8cb3e2170b9e58b0932bce7bfb492775e23 (diff)
powerpc/mm: Workaround Nest MMU bug with TLB invalidations
On POWER9 the Nest MMU may fail to invalidate some translations when doing a tlbie "by PID" or "by LPID" that is targeted at the TLB only and not the page walk cache. This works around it by forcing such invalidations to escalate to RIC=2 (full invalidation of TLB *and* PWC) when a coprocessor is in use for the context. Fixes: 03b8abedf4f4 ("cxl: Enable global TLBIs for cxl contexts") Cc: stable@vger.kernel.org # v4.15+ Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Balbir Singh <bsingharora@gmail.com> [balbirs: fixed spelling and coding style to quiesce checkpatch.pl] Tested-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/mn10300/unit-asb2305/unit-init.c')
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