diff options
author | Manuel Lauss <manuel.lauss@googlemail.com> | 2010-02-23 18:57:43 +0100 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:41 +0100 |
commit | e275ed5ee94b358964a0dae1c8b49f0bff260b60 (patch) | |
tree | 3459082d9ba20771210dd38f3d62b99e5ff6cbbb /arch/mips | |
parent | 81fc0179541dd52763cf62a52f0c09a05bcc6439 (diff) |
MIPS: Alchemy: devboard PM needs to save CPLD registers.
Save/restore CPLD registers when doing suspend-to-ram; this fixes issues
with harddisk and ethernet not working correctly when resuming on DB1200.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/alchemy/devboards/pm.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/alchemy/devboards/pm.c b/arch/mips/alchemy/devboards/pm.c index 632f9862a0fb..4bbd3133e451 100644 --- a/arch/mips/alchemy/devboards/pm.c +++ b/arch/mips/alchemy/devboards/pm.c @@ -10,6 +10,7 @@ #include <linux/sysfs.h> #include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/gpio.h> +#include <asm/mach-db1x00/bcsr.h> /* * Generic suspend userspace interface for Alchemy development boards. @@ -26,6 +27,20 @@ static unsigned long db1x_pm_last_wakesrc; static int db1x_pm_enter(suspend_state_t state) { + unsigned short bcsrs[16]; + int i, j, hasint; + + /* save CPLD regs */ + hasint = bcsr_read(BCSR_WHOAMI); + hasint = BCSR_WHOAMI_BOARD(hasint) >= BCSR_WHOAMI_DB1200; + j = (hasint) ? BCSR_MASKSET : BCSR_SYSTEM; + + for (i = BCSR_STATUS; i <= j; i++) + bcsrs[i] = bcsr_read(i); + + /* shut off hexleds */ + bcsr_write(BCSR_HEXCLEAR, 3); + /* enable GPIO based wakeup */ alchemy_gpio1_input_enable(); @@ -52,6 +67,23 @@ static int db1x_pm_enter(suspend_state_t state) /* ...and now the sandman can come! */ au_sleep(); + + /* restore CPLD regs */ + for (i = BCSR_STATUS; i <= BCSR_SYSTEM; i++) + bcsr_write(i, bcsrs[i]); + + /* restore CPLD int registers */ + if (hasint) { + bcsr_write(BCSR_INTCLR, 0xffff); + bcsr_write(BCSR_MASKCLR, 0xffff); + bcsr_write(BCSR_INTSTAT, 0xffff); + bcsr_write(BCSR_INTSET, bcsrs[BCSR_INTSET]); + bcsr_write(BCSR_MASKSET, bcsrs[BCSR_MASKSET]); + } + + /* light up hexleds */ + bcsr_write(BCSR_HEXCLEAR, 0); + return 0; } |