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author周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>2021-06-26 14:18:37 +0800
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-06-30 14:37:16 +0200
commit579f73cf84859032c14b39562e35a39741a9c311 (patch)
tree70dbdf9bd411524ceaa5fec9d0daac4c64a2ef41 /arch/mips
parentc994a3ec7ecc8bd2a837b2061e8a76eb8efc082b (diff)
MIPS: X1830: Respect cell count of common properties.
If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N * X) cells. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/boot/dts/ingenic/x1830.dtsi9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi
index b21c93057356..59ca3a869d7c 100644
--- a/arch/mips/boot/dts/ingenic/x1830.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1830.dtsi
@@ -97,9 +97,9 @@
#clock-cells = <1>;
- clocks = <&cgu X1830_CLK_RTCLK
- &cgu X1830_CLK_EXCLK
- &cgu X1830_CLK_PCLK>;
+ clocks = <&cgu X1830_CLK_RTCLK>,
+ <&cgu X1830_CLK_EXCLK>,
+ <&cgu X1830_CLK_PCLK>;
clock-names = "rtc", "ext", "pclk";
interrupt-controller;
@@ -274,8 +274,7 @@
pdma: dma-controller@13420000 {
compatible = "ingenic,x1830-dma";
- reg = <0x13420000 0x400
- 0x13421000 0x40>;
+ reg = <0x13420000 0x400>, <0x13421000 0x40>;
#dma-cells = <2>;
interrupt-parent = <&intc>;