[MIPS] Cleanup TX39/TX49 irq code

Cleanup jmr3927, tx4927 and tx4938 irq codes, using common IRQ_CPU,
I8259 and IRQ_TXX9 irq routines.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 21 insertions, 556 deletions

diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
index 00b0b975f349..0aabd57fdad2 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -23,398 +23,20 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  675 Mass Ave, Cambridge, MA 02139, USA.
  */
-#include <linux/errno.h>
 #include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/types.h>
 #include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/timex.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/irq.h>
-#include <linux/bitops.h>
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
+#include <asm/irq_cpu.h>
 #include <asm/mipsregs.h>
-#include <asm/system.h>
 #include <asm/tx4927/tx4927.h>
 #ifdef CONFIG_TOSHIBA_RBTX4927
 #include <asm/tx4927/toshiba_rbtx4927.h>
 #endif
 
-/*
- * DEBUG
- */
-
-#undef TX4927_IRQ_DEBUG
-
-#ifdef TX4927_IRQ_DEBUG
-#define TX4927_IRQ_NONE        0x00000000
-
-#define TX4927_IRQ_INFO        ( 1 <<  0 )
-#define TX4927_IRQ_WARN        ( 1 <<  1 )
-#define TX4927_IRQ_EROR        ( 1 <<  2 )
-
-#define TX4927_IRQ_INIT        ( 1 <<  5 )
-#define TX4927_IRQ_NEST1       ( 1 <<  6 )
-#define TX4927_IRQ_NEST2       ( 1 <<  7 )
-#define TX4927_IRQ_NEST3       ( 1 <<  8 )
-#define TX4927_IRQ_NEST4       ( 1 <<  9 )
-
-#define TX4927_IRQ_CP0_INIT     ( 1 << 10 )
-#define TX4927_IRQ_CP0_ENABLE   ( 1 << 13 )
-#define TX4927_IRQ_CP0_DISABLE  ( 1 << 14 )
-
-#define TX4927_IRQ_PIC_INIT     ( 1 << 20 )
-#define TX4927_IRQ_PIC_ENABLE   ( 1 << 23 )
-#define TX4927_IRQ_PIC_DISABLE  ( 1 << 24 )
-
-#define TX4927_IRQ_ALL         0xffffffff
-#endif
-
-#ifdef TX4927_IRQ_DEBUG
-static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
-					  | TX4927_IRQ_INFO
-					  | TX4927_IRQ_WARN | TX4927_IRQ_EROR
-//                                       | TX4927_IRQ_CP0_INIT
-//                                       | TX4927_IRQ_CP0_ENABLE
-//                                       | TX4927_IRQ_CP0_ENDIRQ
-//                                       | TX4927_IRQ_PIC_INIT
-//                                       | TX4927_IRQ_PIC_ENABLE
-//                                       | TX4927_IRQ_PIC_DISABLE
-//                                       | TX4927_IRQ_INIT
-//                                       | TX4927_IRQ_NEST1
-//                                       | TX4927_IRQ_NEST2
-//                                       | TX4927_IRQ_NEST3
-//                                       | TX4927_IRQ_NEST4
-    );
-#endif
-
-#ifdef TX4927_IRQ_DEBUG
-#define TX4927_IRQ_DPRINTK(flag,str...) \
-        if ( (tx4927_irq_debug_flag) & (flag) ) \
-        { \
-           char tmp[100]; \
-           sprintf( tmp, str ); \
-           printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
-        }
-#else
-#define TX4927_IRQ_DPRINTK(flag,str...)
-#endif
-
-/*
- * Forwad definitions for all pic's
- */
-
-static void tx4927_irq_cp0_enable(unsigned int irq);
-static void tx4927_irq_cp0_disable(unsigned int irq);
-
-static void tx4927_irq_pic_enable(unsigned int irq);
-static void tx4927_irq_pic_disable(unsigned int irq);
-
-/*
- * Kernel structs for all pic's
- */
-
-#define TX4927_CP0_NAME "TX4927-CP0"
-static struct irq_chip tx4927_irq_cp0_type = {
-	.name		= TX4927_CP0_NAME,
-	.ack		= tx4927_irq_cp0_disable,
-	.mask		= tx4927_irq_cp0_disable,
-	.mask_ack	= tx4927_irq_cp0_disable,
-	.unmask		= tx4927_irq_cp0_enable,
-};
-
-#define TX4927_PIC_NAME "TX4927-PIC"
-static struct irq_chip tx4927_irq_pic_type = {
-	.name		= TX4927_PIC_NAME,
-	.ack		= tx4927_irq_pic_disable,
-	.mask		= tx4927_irq_pic_disable,
-	.mask_ack	= tx4927_irq_pic_disable,
-	.unmask		= tx4927_irq_pic_enable,
-};
-
-#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
-static struct irqaction tx4927_irq_pic_action =
-TX4927_PIC_ACTION(TX4927_PIC_NAME);
-
-#define CCP0_STATUS 12
-#define CCP0_CAUSE 13
-
-/*
- * Functions for cp0
- */
-
-#define tx4927_irq_cp0_mask(irq) ( 1 << ( irq-TX4927_IRQ_CP0_BEG+8 ) )
-
-static void
-tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits)
-{
-	unsigned long val = 0;
-
-	switch (cp0_reg) {
-	case CCP0_STATUS:
-		val = read_c0_status();
-		break;
-
-	case CCP0_CAUSE:
-		val = read_c0_cause();
-		break;
-
-	}
-
-	val &= (~clr_bits);
-	val |= (set_bits);
-
-	switch (cp0_reg) {
-	case CCP0_STATUS:{
-			write_c0_status(val);
-			break;
-		}
-	case CCP0_CAUSE:{
-			write_c0_cause(val);
-			break;
-		}
-	}
-}
-
-static void __init tx4927_irq_cp0_init(void)
-{
-	int i;
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n",
-			   TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END);
-
-	for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++)
-		set_irq_chip_and_handler(i, &tx4927_irq_cp0_type,
-					 handle_level_irq);
-}
-
-static void tx4927_irq_cp0_enable(unsigned int irq)
-{
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq);
-
-	tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq));
-}
-
-static void tx4927_irq_cp0_disable(unsigned int irq)
-{
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq);
-
-	tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
-}
-
-/*
- * Functions for pic
- */
-u32 tx4927_irq_pic_addr(int irq)
-{
-	/* MVMCP -- need to formulize this */
-	irq -= TX4927_IRQ_PIC_BEG;
-	switch (irq) {
-	case 17:
-	case 16:
-	case 1:
-	case 0:
-		return (0xff1ff610);
-
-	case 19:
-	case 18:
-	case 3:
-	case 2:
-		return (0xff1ff614);
-
-	case 21:
-	case 20:
-	case 5:
-	case 4:
-		return (0xff1ff618);
-
-	case 23:
-	case 22:
-	case 7:
-	case 6:
-		return (0xff1ff61c);
-
-	case 25:
-	case 24:
-	case 9:
-	case 8:
-		return (0xff1ff620);
-
-	case 27:
-	case 26:
-	case 11:
-	case 10:
-		return (0xff1ff624);
-
-	case 29:
-	case 28:
-	case 13:
-	case 12:
-		return (0xff1ff628);
-
-	case 31:
-	case 30:
-	case 15:
-	case 14:
-		return (0xff1ff62c);
-
-	}
-	return (0);
-}
-
-u32 tx4927_irq_pic_mask(int irq)
-{
-	/* MVMCP -- need to formulize this */
-	irq -= TX4927_IRQ_PIC_BEG;
-	switch (irq) {
-	case 31:
-	case 29:
-	case 27:
-	case 25:
-	case 23:
-	case 21:
-	case 19:
-	case 17:{
-			return (0x07000000);
-		}
-	case 30:
-	case 28:
-	case 26:
-	case 24:
-	case 22:
-	case 20:
-	case 18:
-	case 16:{
-			return (0x00070000);
-		}
-	case 15:
-	case 13:
-	case 11:
-	case 9:
-	case 7:
-	case 5:
-	case 3:
-	case 1:{
-			return (0x00000700);
-		}
-	case 14:
-	case 12:
-	case 10:
-	case 8:
-	case 6:
-	case 4:
-	case 2:
-	case 0:{
-			return (0x00000007);
-		}
-	}
-	return (0x00000000);
-}
-
-static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits,
-	unsigned set_bits)
-{
-	unsigned long val = 0;
-
-	val = TX4927_RD(pic_reg);
-	val &= (~clr_bits);
-	val |= (set_bits);
-	TX4927_WR(pic_reg, val);
-}
-
-static void __init tx4927_irq_pic_init(void)
-{
-	int i;
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n",
-			   TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END);
-
-	for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++)
-		set_irq_chip_and_handler(i, &tx4927_irq_pic_type,
-					 handle_level_irq);
-
-	setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
-
-	TX4927_WR(0xff1ff640, 0x6);	/* irq level mask -- only accept hightest */
-	TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1);	/* irq enable */
-}
-
-static void tx4927_irq_pic_enable(unsigned int irq)
-{
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq);
-
-	tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0,
-			      tx4927_irq_pic_mask(irq));
-}
-
-static void tx4927_irq_pic_disable(unsigned int irq)
-{
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq);
-
-	tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq),
-			      tx4927_irq_pic_mask(irq), 0);
-}
-
-/*
- * Main init functions
- */
 void __init tx4927_irq_init(void)
 {
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "-\n");
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_cp0_init()\n");
-	tx4927_irq_cp0_init();
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_pic_init()\n");
-	tx4927_irq_pic_init();
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n");
-}
-
-static int tx4927_irq_nested(void)
-{
-	int sw_irq = 0;
-	u32 level2;
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "-\n");
-
-	level2 = TX4927_RD(0xff1ff6a0);
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=level2a=0x%x\n", level2);
-
-	if ((level2 & 0x10000) == 0) {
-		level2 &= 0x1f;
-		TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=level2b=0x%x\n", level2);
-
-		sw_irq = TX4927_IRQ_PIC_BEG + level2;
-		TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=sw_irq=%d\n", sw_irq);
-
-		if (sw_irq == 27) {
-			TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq-%d\n",
-					   sw_irq);
-
-#ifdef CONFIG_TOSHIBA_RBTX4927
-			{
-				sw_irq = toshiba_rbtx4927_irq_nested(sw_irq);
-			}
-#endif
-
-			TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq+%d\n",
-					   sw_irq);
-		}
-	}
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=sw_irq=%d\n", sw_irq);
-
-	TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "+\n");
-
-	return (sw_irq);
+	mips_cpu_irq_init();
+	txx9_irq_init(TX4927_IRC_REG);
+	set_irq_chained_handler(TX4927_IRQ_NEST_PIC_ON_CP0, handle_simple_irq);
 }
 
 asmlinkage void plat_irq_dispatch(void)
@@ -424,9 +46,12 @@ asmlinkage void plat_irq_dispatch(void)
 	if (pending & STATUSF_IP7)			/* cpu timer */
 		do_IRQ(TX4927_IRQ_CPU_TIMER);
 	else if (pending & STATUSF_IP2) {		/* tx4927 pic */
-		unsigned int irq = tx4927_irq_nested();
-
-		if (unlikely(irq == 0)) {
+		int irq = txx9_irq();
+#ifdef CONFIG_TOSHIBA_RBTX4927
+		if (irq == TX4927_IRQ_NEST_EXT_ON_PIC)
+			irq = toshiba_rbtx4927_irq_nested(irq);
+#endif
+		if (unlikely(irq < 0)) {
 			spurious_interrupt();
 			return;
 		}
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index e265fcd31b60..9607ad5e734a 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -133,6 +133,7 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
 #include <linux/bootmem.h>
 #include <linux/blkdev.h>
 #ifdef CONFIG_TOSHIBA_FPCIB0
+#include <asm/i8259.h>
 #include <asm/tx4927/smsc_fdc37m81x.h>
 #endif
 #include <asm/tx4927/toshiba_rbtx4927.h>
@@ -151,11 +152,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
 #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE    ( 1 << 13 )
 #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE   ( 1 << 14 )
 
-#define TOSHIBA_RBTX4927_IRQ_ISA_INIT      ( 1 << 20 )
-#define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE    ( 1 << 23 )
-#define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE   ( 1 << 24 )
-#define TOSHIBA_RBTX4927_IRQ_ISA_MASK      ( 1 << 25 )
-
 #define TOSHIBA_RBTX4927_SETUP_ALL         0xffffffff
 #endif
 
@@ -167,10 +163,6 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_INIT
 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
-//                                                 | TOSHIBA_RBTX4927_IRQ_ISA_INIT
-//                                                 | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
-//                                                 | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
-//                                                 | TOSHIBA_RBTX4927_IRQ_ISA_MASK
     );
 #endif
 
@@ -196,33 +188,14 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
 #define TOSHIBA_RBTX4927_IRQ_IOC_BEG  ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG)	/* 56 */
 #define TOSHIBA_RBTX4927_IRQ_IOC_END  ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END)	/* 63 */
 
-
-#define TOSHIBA_RBTX4927_IRQ_ISA_BEG MI8259_IRQ_ISA_BEG
-#define TOSHIBA_RBTX4927_IRQ_ISA_END MI8259_IRQ_ISA_END
-#define TOSHIBA_RBTX4927_IRQ_ISA_MID ((TOSHIBA_RBTX4927_IRQ_ISA_BEG+TOSHIBA_RBTX4927_IRQ_ISA_END+1)/2)
-
-
 #define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
 #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
-#define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA (TOSHIBA_RBTX4927_IRQ_ISA_BEG+2)
 
 extern int tx4927_using_backplane;
 
-#ifdef CONFIG_TOSHIBA_FPCIB0
-extern void enable_8259A_irq(unsigned int irq);
-extern void disable_8259A_irq(unsigned int irq);
-extern void mask_and_ack_8259A(unsigned int irq);
-#endif
-
 static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
 static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
 
-#ifdef CONFIG_TOSHIBA_FPCIB0
-static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq);
-static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq);
-static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq);
-#endif
-
 #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
 static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
 	.name = TOSHIBA_RBTX4927_IOC_NAME,
@@ -235,18 +208,6 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
 #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006
 
 
-#ifdef CONFIG_TOSHIBA_FPCIB0
-#define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA"
-static struct irq_chip toshiba_rbtx4927_irq_isa_type = {
-	.name = TOSHIBA_RBTX4927_ISA_NAME,
-	.ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
-	.mask = toshiba_rbtx4927_irq_isa_disable,
-	.mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
-	.unmask = toshiba_rbtx4927_irq_isa_enable,
-};
-#endif
-
-
 u32 bit2num(u32 num)
 {
 	u32 i;
@@ -271,31 +232,10 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
 		}
 	}
 #ifdef CONFIG_TOSHIBA_FPCIB0
-	{
-		if (tx4927_using_backplane) {
-			u32 level4;
-			u32 level5;
-			outb(0x0A, 0x20);
-			level4 = inb(0x20) & 0xff;
-			if (level4) {
-				sw_irq =
-				    TOSHIBA_RBTX4927_IRQ_ISA_BEG +
-				    bit2num(level4);
-				if (sw_irq !=
-				    TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA) {
-					goto RETURN;
-				}
-			}
-
-			outb(0x0A, 0xA0);
-			level5 = inb(0xA0) & 0xff;
-			if (level5) {
-				sw_irq =
-				    TOSHIBA_RBTX4927_IRQ_ISA_MID +
-				    bit2num(level5);
-				goto RETURN;
-			}
-		}
+	if (tx4927_using_backplane) {
+		int irq = i8259_irq();
+		if (irq >= 0)
+			sw_irq = irq;
 	}
 #endif
 
@@ -307,12 +247,6 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
 #define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
 static struct irqaction toshiba_rbtx4927_irq_ioc_action =
 TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
-#ifdef CONFIG_TOSHIBA_FPCIB0
-static struct irqaction toshiba_rbtx4927_irq_isa_master =
-TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/M");
-static struct irqaction toshiba_rbtx4927_irq_isa_slave =
-TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/S");
-#endif
 
 
 /**********************************************************************************/
@@ -378,92 +312,6 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
 }
 
 
-/**********************************************************************************/
-/* Functions for isa                                                              */
-/**********************************************************************************/
-
-
-#ifdef CONFIG_TOSHIBA_FPCIB0
-static void __init toshiba_rbtx4927_irq_isa_init(void)
-{
-	int i;
-
-	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_INIT,
-				     "beg=%d end=%d\n",
-				     TOSHIBA_RBTX4927_IRQ_ISA_BEG,
-				     TOSHIBA_RBTX4927_IRQ_ISA_END);
-
-	for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG;
-	     i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++)
-		set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_isa_type,
-					 handle_level_irq);
-
-	setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
-		  &toshiba_rbtx4927_irq_isa_master);
-	setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA,
-		  &toshiba_rbtx4927_irq_isa_slave);
-
-	/* make sure we are looking at IRR (not ISR) */
-	outb(0x0A, 0x20);
-	outb(0x0A, 0xA0);
-}
-#endif
-
-
-#ifdef CONFIG_TOSHIBA_FPCIB0
-static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq)
-{
-	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENABLE,
-				     "irq=%d\n", irq);
-
-	if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
-	    || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
-		TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
-					     "bad irq=%d\n", irq);
-		panic("\n");
-	}
-
-	enable_8259A_irq(irq);
-}
-#endif
-
-
-#ifdef CONFIG_TOSHIBA_FPCIB0
-static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq)
-{
-	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_DISABLE,
-				     "irq=%d\n", irq);
-
-	if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
-	    || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
-		TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
-					     "bad irq=%d\n", irq);
-		panic("\n");
-	}
-
-	disable_8259A_irq(irq);
-}
-#endif
-
-
-#ifdef CONFIG_TOSHIBA_FPCIB0
-static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq)
-{
-	TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_MASK,
-				     "irq=%d\n", irq);
-
-	if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
-	    || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
-		TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
-					     "bad irq=%d\n", irq);
-		panic("\n");
-	}
-
-	mask_and_ack_8259A(irq);
-}
-#endif
-
-
 void __init arch_init_irq(void)
 {
 	extern void tx4927_irq_init(void);
@@ -471,12 +319,11 @@ void __init arch_init_irq(void)
 	tx4927_irq_init();
 	toshiba_rbtx4927_irq_ioc_init();
 #ifdef CONFIG_TOSHIBA_FPCIB0
-	{
-		if (tx4927_using_backplane) {
-			toshiba_rbtx4927_irq_isa_init();
-		}
-	}
+	if (tx4927_using_backplane)
+		init_i8259_irqs();
 #endif
+	/* Onboard 10M Ether: High Active */
+	set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
 
 	wbflush();
 }
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index ea5a70b252a0..3e84237abe63 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -151,7 +151,6 @@ unsigned long mips_memory_upper;
 static int tx4927_ccfg_toeon = 1;
 static int tx4927_pcic_trdyto = 0;	/* default: disabled */
 unsigned long tx4927_ce_base[8];
-void tx4927_pci_setup(void);
 void tx4927_reset_pci_pcic(void);
 int tx4927_pci66 = 0;		/* 0:auto */
 #endif
@@ -442,7 +441,7 @@ arch_initcall(tx4927_pcibios_init);
 extern struct resource pci_io_resource;
 extern struct resource pci_mem_resource;
 
-void tx4927_pci_setup(void)
+void __init tx4927_pci_setup(void)
 {
 	static int called = 0;
 	extern unsigned int tx4927_get_mem_size(void);
@@ -748,12 +747,6 @@ void __init toshiba_rbtx4927_setup(void)
 	}
 #endif
 
-	/* setup irq stuff */
-	TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
-				       ":Setting up tx4927 pic.\n");
-	TX4927_WR(0xff1ff604, 0x00000400);	/* irq trigger */
-	TX4927_WR(0xff1ff608, 0x00000000);	/* irq trigger */
-
 	/* setup serial stuff */
 	TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 				       ":Setting up tx4927 sio.\n");
@@ -915,7 +908,7 @@ void __init toshiba_rbtx4927_setup(void)
 			req.iotype = UPIO_MEM;
 			req.membase = (char *)(0xff1ff300 + i * 0x100);
 			req.mapbase = 0xff1ff300 + i * 0x100;
-			req.irq = 32 + i;
+			req.irq = TX4927_IRQ_PIC_BEG + 8 + i;
 			req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
 			req.uartclk = 50000000;
 			early_serial_txx9_setup(&req);