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authorChen-Yu Tsai <wens@csie.org>2019-12-18 11:04:31 +0800
committerMaxime Ripard <maxime@cerno.tech>2019-12-18 23:06:51 +0100
commitc7b305267eb77fe47498676e9337324c9653494c (patch)
tree883dfb8141d5befac507824815d8c05a61c39ff9 /arch/mips/sgi-ip22
parent4ff40d140e2a2060ef6051800a4a9eab07624f42 (diff)
clk: sunxi-ng: r40: Allow setting parent rate for external clock outputs
One of the uses of the external clock outputs is to provide a stable 32768 Hz clock signal to WiFi and Bluetooth chips. On the R40, the RTC has an internal RC oscillator that is muxed with the external crystal. Allow setting the parent rate for the external clock outputs so that requests for 32768 Hz get passed to the RTC's clock driver to mux in the external crystal if it isn't already muxed correctly. Fixes: cd030a78f7aa ("clk: sunxi-ng: support R40 SoC") Fixes: 01a7ea763fc4 ("clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output") Cc: <stable@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch/mips/sgi-ip22')
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