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authorQing Zhang <zhangqing@loongson.cn>2021-03-15 15:50:00 +0800
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-03-25 10:44:01 +0100
commit95b56e884a50c8e935b4e9f8b289251cc913795e (patch)
treefe00466401bf05d944bc2ce179ded8df7bcf4b45 /arch/mips/loongson64
parent8e2fe0ecfb96d7b1baa9720e36305515c3079e8c (diff)
MIPS: Loongson64: Add support for the Loongson-2K1000 to get cpu_clock_freq
Get the fixed-clock from the CPU0 node of the device tree. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Tested-by: Ming Wang <wangming01@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/loongson64')
-rw-r--r--arch/mips/loongson64/time.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/mips/loongson64/time.c b/arch/mips/loongson64/time.c
index 91e842b58365..f6d2c1e30570 100644
--- a/arch/mips/loongson64/time.c
+++ b/arch/mips/loongson64/time.c
@@ -11,9 +11,33 @@
#include <asm/hpet.h>
#include <loongson.h>
+#include <linux/clk.h>
+#include <linux/of_clk.h>
void __init plat_time_init(void)
{
+ struct clk *clk;
+ struct device_node *np;
+
+ if (loongson_sysconf.fw_interface == LOONGSON_DTB) {
+ of_clk_init(NULL);
+
+ np = of_get_cpu_node(0, NULL);
+ if (!np) {
+ pr_err("Failed to get CPU node\n");
+ return;
+ }
+
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
+ return;
+ }
+
+ cpu_clock_freq = clk_get_rate(clk);
+ clk_put(clk);
+ }
+
/* setup mips r4k timer */
mips_hpt_frequency = cpu_clock_freq / 2;