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authorAlban Bedel <albeu@free.fr>2019-01-16 19:55:45 +0100
committerMark Brown <broonie@kernel.org>2019-01-17 12:34:39 +0000
commit797622d7a3ab5192ff575288bdbec15c3a006280 (patch)
tree67b7c9872993e2ebc73adaa6dfa46ae5cfce9b87 /arch/mips/include/asm
parenta666f2619a97ab9264d3b06055a336b3ee75c108 (diff)
spi: ath79: Simplify ath79_spi_chipselect()
First of all this callback was slightly misused to setup the clock polarity at the beginning of a transfer. Beside being at the wrong place, it is also useless as only SPI mode 1 is supported. Instead just make sure the base value used for IOC is suitable to start a transfer by clearing the clock and data bits during the controller setup. This also remove the last direct usage of the GPIO API, so we can remove the direct dependency on GPIOLIB. Signed-off-by: Alban Bedel <albeu@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'arch/mips/include/asm')
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