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authorMichal Simek <monstr@monstr.eu>2009-09-17 17:37:33 +0200
committerMichal Simek <monstr@monstr.eu>2009-09-22 08:50:15 +0200
commitac854ff1fc779101ff1989c3a20c1f238a2b5f3a (patch)
treef49001366317e3c8032b63c405c05dc457ea36ca /arch/microblaze/kernel
parentafc26cb39e1e74c87a1b5eb013ead2590b91489c (diff)
microblaze: Save and restore msr in hw exception
I thought that this part of code could be removed because just save and restore MSR but any code can't change it. But seems to that any part of code works with this information. This patch solved problem with allocation. Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/kernel')
-rw-r--r--arch/microblaze/kernel/hw_exception_handler.S8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 3288c9737671..0ad0f7011a1a 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -84,9 +84,10 @@
#define NUM_TO_REG(num) r ## num
#ifdef CONFIG_MMU
-/* FIXME you can't change first load of MSR because there is
- * hardcoded jump bri 4 */
#define RESTORE_STATE \
+ lwi r5, r1, 0; \
+ mts rmsr, r5; \
+ nop; \
lwi r3, r1, PT_R3; \
lwi r4, r1, PT_R4; \
lwi r5, r1, PT_R5; \
@@ -309,6 +310,9 @@ _hw_exception_handler:
lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)) /* get saved current */
#endif
+ mfs r5, rmsr;
+ nop
+ swi r5, r1, 0;
mfs r3, resr
nop
mfs r4, rear;