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authorGreg Ungerer <gerg@uclinux.org>2009-04-30 16:22:24 +1000
committerGreg Ungerer <gerg@uclinux.org>2009-09-16 09:43:44 +1000
commit33a21263bf74177209c11f08246fc308916d9ffa (patch)
treee17343a09cb5f0a0faaeb2985b91368cc32cbda1 /arch/m68knommu/platform/coldfire/intc.c
parent6589c1d71581618dfc344628fb425ee4f09ce904 (diff)
m68knommu: use common interrupt controller code for older ColdFire CPU's
The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple interrupt controller. Use common setup code for them. This addition means that all ColdFire CPU's now have some specific type of interrupt controller code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform/coldfire/intc.c')
-rw-r--r--arch/m68knommu/platform/coldfire/intc.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/m68knommu/platform/coldfire/intc.c b/arch/m68knommu/platform/coldfire/intc.c
new file mode 100644
index 000000000000..c81ab6e5cf26
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/intc.c
@@ -0,0 +1,55 @@
+/*
+ * intc.c
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/traps.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+static void intc_irq_mask(unsigned int irq)
+{
+}
+
+static void intc_irq_unmask(unsigned int irq)
+{
+}
+
+static int intc_irq_set_type(unsigned int irq, unsigned int type)
+{
+ return 0;
+}
+
+static struct irq_chip intc_irq_chip = {
+ .name = "CF-INTC",
+ .mask = intc_irq_mask,
+ .unmask = intc_irq_unmask,
+ .set_type = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+ int irq;
+
+ init_vectors();
+
+ for (irq = 0; (irq < NR_IRQS); irq++) {
+ irq_desc[irq].status = IRQ_DISABLED;
+ irq_desc[irq].action = NULL;
+ irq_desc[irq].depth = 1;
+ irq_desc[irq].chip = &intc_irq_chip;
+ intc_irq_set_type(irq, 0);
+ }
+}
+