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authorBorislav Petkov <borislav.petkov@amd.com>2010-01-22 16:01:05 +0100
committerH. Peter Anvin <hpa@zytor.com>2010-01-22 16:06:31 -0800
commitdcf39daf3d6d97f8741e82f0b9fb7554704ed2d1 (patch)
tree5659b2ca396e48cd955cd9d2ee3eacbddb904d9f /arch/m32r/lib
parent48a719c238bcbb72d6da79de9c5b3b93ab472107 (diff)
x86, cacheinfo: Fix disabling of L3 cache indices
* Correct the masks used for writing the cache index disable indices. * Do not turn off L3 scrubber - it is not necessary. * Make sure wbinvd is executed on the same node where the L3 is. * Check for out-of-bounds values written to the registers. * Make show_cache_disable hex values unambiguous * Check for Erratum #388 Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <1264172467-25155-4-git-send-email-bp@amd64.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/m32r/lib')
0 files changed, 0 insertions, 0 deletions