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author | Serge Semin <Sergey.Semin@baikalelectronics.ru> | 2020-03-06 16:19:54 +0300 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2020-03-21 19:32:15 +0100 |
commit | 1f1a714658307a1a5ec65b0a23d87a87da64c86f (patch) | |
tree | 02a1e3e9e6b51a68c539e1596fdd4f2f03787c10 /arch/ia64/uv | |
parent | 1413ef638abae4ab5621901cf4d8ef08a4a48ba6 (diff) |
i2c: designware: Detect the FIFO size in the common code
The problem with detecting the FIFO depth in the platform driver
is that in order to implement this we have to access the controller
IC_COMP_PARAM_1 register. Currently it's done before the
i2c_dw_set_reg_access() method execution, which is errors prone since
the method determines the registers endianness and access mode and we
can't use dw_readl/dw_writel accessors before this information is
retrieved. We also can't move the i2c_dw_set_reg_access() function
invocation to after the master/slave probe functions call (when endianness
and access mode are determined), since the FIFO depth information is used
by them for initializations. So in order to fix the problem we have no
choice but to move the FIFO size detection methods to the common code and
call it at the probe stage.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'arch/ia64/uv')
0 files changed, 0 insertions, 0 deletions