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| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 12:34:57 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 12:34:57 -0700 |
| commit | a989705c4cf6e6c1a339c95f9daf658b4ba88ca8 (patch) | |
| tree | d1925b831ec9fbae65db1b193dbad1869c43a9bc /arch/ia64/kernel/mca_asm.S | |
| parent | 2d56d3c43cc97ae48586745556f5a5b564d61582 (diff) | |
| parent | d29182534c5f39ff899763d1e0982d8f33791d6f (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] update memory attribute aliasing documentation & test cases
[IA64] fail mmaps that span areas with incompatible attributes
[IA64] allow WB /sys/.../legacy_mem mmaps
[IA64] make ioremap avoid unsupported attributes
[IA64] rename ioremap variables to match i386
[IA64] relax per-cpu TLB requirement to DTC
[IA64] remove per-cpu ia64_phys_stacked_size_p8
[IA64] Fix example error injection program
[IA64] Itanium MC Error Injection Tool: pal_mc_error_inject() interface
[IA64] Itanium MC Error Injection Tool: Makefile changes
[IA64] Itanium MC Error Injection Tool: Driver sysfs interface
[IA64] Itanium MC Error Injection Tool: Doc and sample application
[IA64] Itanium MC Error Injection Tool: Kernel configuration
Diffstat (limited to 'arch/ia64/kernel/mca_asm.S')
| -rw-r--r-- | arch/ia64/kernel/mca_asm.S | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S index c6b607c00dee..8c9c26aa6ae0 100644 --- a/arch/ia64/kernel/mca_asm.S +++ b/arch/ia64/kernel/mca_asm.S @@ -101,14 +101,6 @@ ia64_do_tlb_purge: ;; srlz.d ;; - // 2. Purge DTR for PERCPU data. - movl r16=PERCPU_ADDR - mov r18=PERCPU_PAGE_SHIFT<<2 - ;; - ptr.d r16,r18 - ;; - srlz.d - ;; // 3. Purge ITR for PAL code. GET_THIS_PADDR(r2, ia64_mca_pal_base) ;; @@ -196,22 +188,6 @@ ia64_reload_tr: srlz.i srlz.d ;; - // 2. Reload DTR register for PERCPU data. - GET_THIS_PADDR(r2, ia64_mca_per_cpu_pte) - ;; - movl r16=PERCPU_ADDR // vaddr - movl r18=PERCPU_PAGE_SHIFT<<2 - ;; - mov cr.itir=r18 - mov cr.ifa=r16 - ;; - ld8 r18=[r2] // load per-CPU PTE - mov r16=IA64_TR_PERCPU_DATA; - ;; - itr.d dtr[r16]=r18 - ;; - srlz.d - ;; // 3. Reload ITR for PAL code. GET_THIS_PADDR(r2, ia64_mca_pal_pte) ;; |