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authorPeter Zijlstra <peterz@infradead.org>2020-09-15 12:31:59 +0200
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2020-09-16 19:36:25 +0200
commita889a23a98fee183c9b6b0b14b2fd70583429c5e (patch)
tree0fb646b22408d9cec184dc49aa29f89cffef5826 /arch/ia64/include
parentaa6b43d57f995f6eec0e9e744dcb200e09ecb8e0 (diff)
ACPI: processor: Use CPUIDLE_FLAG_TLB_FLUSHED
Make acpi_processor_idle() use the generic TLB flushing code. This again removes RCU usage after rcu_idle_enter(). (XXX make every C3 invalidate TLBs, not just C3-BM) Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Borislav Petkov <bp@suse.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch/ia64/include')
-rw-r--r--arch/ia64/include/asm/acpi.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index b66ba907019c..87927eb824cc 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -74,8 +74,6 @@ static inline void arch_acpi_set_pdc_bits(u32 *buf)
buf[2] |= ACPI_PDC_EST_CAPABILITY_SMP;
}
-#define acpi_unlazy_tlb(x)
-
#ifdef CONFIG_ACPI_NUMA
extern cpumask_t early_cpu_possible_map;
#define for_each_possible_early_cpu(cpu) \