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authorShaohua Li <shaohua.li@intel.com>2005-11-07 00:58:42 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-07 07:53:30 -0800
commit31ab269a0307d8725737dfbbdeb5dcde7b41bc36 (patch)
tree15bfdaddcb3831d30e6d34caa54356b63adc61ae /arch/i386/kernel/cpu/mcheck/p5.c
parent47b90ffe5c10ab9b5cfd14087b28b13109673ee5 (diff)
[PATCH] x86: add MCE resume
It's widely seen a MCE non-fatal error reported after resume. It seems MCE resume is lacked under ia32. This patch tries to fix the gap. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/cpu/mcheck/p5.c')
-rw-r--r--arch/i386/kernel/cpu/mcheck/p5.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/i386/kernel/cpu/mcheck/p5.c b/arch/i386/kernel/cpu/mcheck/p5.c
index 3a2e24baddc7..94bc43d950cf 100644
--- a/arch/i386/kernel/cpu/mcheck/p5.c
+++ b/arch/i386/kernel/cpu/mcheck/p5.c
@@ -28,7 +28,7 @@ static fastcall void pentium_machine_check(struct pt_regs * regs, long error_cod
}
/* Set up machine check reporting for processors with Intel style MCE */
-void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
{
u32 l, h;