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author | Marc Zyngier <maz@kernel.org> | 2019-01-02 12:34:25 +0000 |
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committer | Marc Zyngier <maz@kernel.org> | 2020-07-07 09:28:37 +0100 |
commit | efaa5b93afde088411b67a0dde34e67aedc6e72f (patch) | |
tree | 5f160be703849abc5a12dba27dfa05ae758ffffe /arch/hexagon | |
parent | a0e50aa3f4a8a5c9fb791b8f32d624e2a1a735bd (diff) |
KVM: arm64: Use TTL hint in when invalidating stage-2 translations
Since we often have a precise idea of the level we're dealing with
when invalidating TLBs, we can provide it to as a hint to our
invalidation helper.
Reviewed-by: James Morse <james.morse@arm.com>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/hexagon')
0 files changed, 0 insertions, 0 deletions