diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2018-03-07 21:21:59 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-09 23:19:58 +0100 |
| commit | fd8773f9f544955f6f47dc2ac3ab85ad64376b7f (patch) | |
| tree | 2eedaf10b5a4b62df0d3b514cec9614a6af6b563 /arch/frv/lib/atomic-ops.S | |
| parent | 739d875dd6982618020d30f58f8acf10f6076e6d (diff) | |
arch: remove frv port
The Fujitsu FRV kernel port has been around for a long time, but has not
seen regular updates in several years and instead was marked 'Orphaned'
in 2016 by long-time maintainer David Howells.
The SoC product line apparently is apparently still around in the form
of the Socionext Milbeaut image processor, but this one no longer uses
the FRV CPU cores.
This removes all FRV specific files from the kernel.
Link: http://www.socionext.com/en/products/assp/milbeaut/
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/frv/lib/atomic-ops.S')
| -rw-r--r-- | arch/frv/lib/atomic-ops.S | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/arch/frv/lib/atomic-ops.S b/arch/frv/lib/atomic-ops.S deleted file mode 100644 index b7439a960b5b..000000000000 --- a/arch/frv/lib/atomic-ops.S +++ /dev/null @@ -1,62 +0,0 @@ -/* atomic-ops.S: kernel atomic operations - * - * For an explanation of how atomic ops work in this arch, see: - * Documentation/frv/atomic-ops.txt - * - * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <asm/spr-regs.h> - - .text - .balign 4 - -############################################################################### -# -# uint32_t __xchg_32(uint32_t i, uint32_t *v) -# -############################################################################### - .globl __xchg_32 - .type __xchg_32,@function -__xchg_32: - or.p gr8,gr8,gr10 -0: - orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */ - ckeq icc3,cc7 - ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */ - orcr cc7,cc7,cc3 /* set CC3 to true */ - cst.p gr10,@(gr9,gr0) ,cc3,#1 - corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */ - beq icc3,#0,0b - bralr - - .size __xchg_32, .-__xchg_32 - -############################################################################### -# -# uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new) -# -############################################################################### - .globl __cmpxchg_32 - .type __cmpxchg_32,@function -__cmpxchg_32: - or.p gr8,gr8,gr11 -0: - orcc gr0,gr0,gr0,icc3 - ckeq icc3,cc7 - ld.p @(gr11,gr0),gr8 - orcr cc7,cc7,cc3 - subcc gr8,gr9,gr7,icc0 - bnelr icc0,#0 - cst.p gr10,@(gr11,gr0) ,cc3,#1 - corcc gr29,gr29,gr0 ,cc3,#1 - beq icc3,#0,0b - bralr - - .size __cmpxchg_32, .-__cmpxchg_32 |