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authorMike Frysinger <vapier.adi@gmail.com>2008-10-08 17:39:02 +0800
committerBryan Wu <cooloney@kernel.org>2008-10-08 17:39:02 +0800
commit7eb2c23f602ab35c5f4227bc87945a3c78a14150 (patch)
tree6b425917db9e1e01d4f815a2aedf7c55e19b9915 /arch/blackfin
parent5b04f271fe49bb7adb061de454d383c027a18de0 (diff)
Blackfin arch: fix merge errors during 2.6.26 upgrade
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/Kconfig18
1 files changed, 8 insertions, 10 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 9d936a3986c8..a837bb6e7bbd 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -375,14 +375,6 @@ config SCLK_DIV
This can be between 1 and 15
System Clock = (PLL frequency) / (this setting)
-config MAX_MEM_SIZE
- int "Max SDRAM Memory Size in MBytes"
- depends on !MPU
- default 512
- help
- This is the max memory size that the kernel will create CPLB
- tables for. Your system will not be able to handle any more.
-
choice
prompt "DDR SDRAM Chip Type"
depends on BFIN_KERNEL_CLOCK
@@ -396,6 +388,14 @@ config MEM_MT46V32M16_5B
bool "MT46V32M16_5B"
endchoice
+config MAX_MEM_SIZE
+ int "Max SDRAM Memory Size in MBytes"
+ depends on !MPU
+ default 512
+ help
+ This is the max memory size that the kernel will create CPLB
+ tables for. Your system will not be able to handle any more.
+
#
# Max & Min Speeds for various Chips
#
@@ -462,8 +462,6 @@ config CYCLES_CLOCKSOURCE
source kernel/time/Kconfig
-comment "Memory Setup"
-
comment "Misc"
choice