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authorAndre Wolokita <Andre.Wolokita@analog.com>2014-09-05 10:42:28 +1000
committerSteven Miao <realmz6@gmail.com>2015-04-23 21:34:31 +0800
commitbb717b33aa6b01abcc78c7a18dec343a3bde9574 (patch)
tree447338e6473068f7c3e7c883ca794df6433dc837 /arch/blackfin/mach-bf527
parentf7fee0366c861c66c9abc8ab9a250bea2dd53c8d (diff)
debug-mmrs: Eliminate all traces of the USB_PHY_TEST MMR
Interacting with the USB_PHY_TEST MMR through debugfs was causing wide-spread chaos in the realm (kernel panic). Expunge all references to this demonic register. Signed-off-by: Andre Wolokita <Andre.Wolokita@analog.com>
Diffstat (limited to 'arch/blackfin/mach-bf527')
-rw-r--r--arch/blackfin/mach-bf527/include/mach/cdefBF525.h5
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF525.h4
2 files changed, 0 insertions, 9 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/cdefBF525.h b/arch/blackfin/mach-bf527/include/mach/cdefBF525.h
index d90a85b6b6b9..bd045318a250 100644
--- a/arch/blackfin/mach-bf527/include/mach/cdefBF525.h
+++ b/arch/blackfin/mach-bf527/include/mach/cdefBF525.h
@@ -122,11 +122,6 @@
#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2)
#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val)
-/* (PHY_TEST is for ADI usage only) */
-
-#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST)
-#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val)
-
#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL)
#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val)
#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF525.h b/arch/blackfin/mach-bf527/include/mach/defBF525.h
index 71578d964d00..591e00ff620a 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF525.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF525.h
@@ -77,10 +77,6 @@
#define USB_APHY_CNTRL2 0xffc039e8 /* Register used to prevent re-enumeration once Moab goes into hibernate mode */
-/* (PHY_TEST is for ADI usage only) */
-
-#define USB_PHY_TEST 0xffc039ec /* Used for reducing simulation time and simplifies FIFO testability */
-
#define USB_PLLOSC_CTRL 0xffc039f0 /* Used to program different parameters for USB PLL and Oscillator */
#define USB_SRP_CLKDIV 0xffc039f4 /* Used to program clock divide value for the clock fed to the SRP detection logic */