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authorShinobu Uehara <shinobu.uehara.xc@renesas.com>2014-10-30 14:57:57 +0900
committerSimon Horman <horms+renesas@verge.net.au>2014-11-10 09:55:51 +0900
commitedd7b938637701567a54306adb27cfb4345fedc5 (patch)
tree6333b646515c28558c8f3cd026f0d2bc93f70643 /arch/arm
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
ARM: shmobile: r8a7790: Fix SD3CKCR address to device tree
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d0e17733dc1a..e20affe156c1 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -666,9 +666,9 @@
#clock-cells = <0>;
clock-output-names = "sd2";
};
- sd3_clk: sd3_clk@e615007c {
+ sd3_clk: sd3_clk@e615026c {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
- reg = <0 0xe615007c 0 4>;
+ reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-output-names = "sd3";