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authorArnd Bergmann <arnd@arndb.de>2017-10-19 18:07:09 +0200
committerArnd Bergmann <arnd@arndb.de>2017-10-19 18:07:09 +0200
commite7ffa44d37cdb8b43bcb6f49eb227bb340dda22d (patch)
treea3e50d8f2e305d64e058075c50d10bf3cbe8116a /arch/arm
parent84dbf97808955ea12286c9f442902360e0e1cc96 (diff)
parentc14963521502b237a6817aceda6f3379296db75c (diff)
Merge tag 'arm-soc/for-4.15/soc' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.15 (part 1)" from Florian Fainelli: This pull request contains Broadcom ARM-based SoC/Kconfig changes for 4.15 please pull the following: - Danilo removes the clock provider driver stubs which are no longer needed now that we have a proper CPRMAN clock provider driver - Stefan moves the SMP startup code for BCM2836 from the interrupt controller driver down to where it belongs in the architecture code, this was requested by Marc Zyngier before comitting any fixes to that code - Phil provides a fix for a future Raspberry Pi firmware which will make the secondary cores wait for an event and therefore requires the CPU onlining other cores to send such event (along with the appropriate barrier) - Florian fixes the BRCMSTB UART debug stub to work correctly when using an ARM BE8 kernel since there were some missing register read swapping needed * tag 'arm-soc/for-4.15/soc' of http://github.com/Broadcom/stblinux: ARM: brcmstb: Add appropriate ARM_BE8() macros for swapping ARM: bcm2836: Send event when onlining other cores irqchip: bcm2836: Move SMP startup code to arch/arm (v2) clk: bcm2835: remove remains from stub clk driver
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/debug/brcmstb.S3
-rw-r--r--arch/arm/mach-bcm/Makefile5
-rw-r--r--arch/arm/mach-bcm/board_bcm2835.c11
-rw-r--r--arch/arm/mach-bcm/platsmp.c38
-rw-r--r--arch/arm/mach-bcm/platsmp.h10
5 files changed, 60 insertions, 7 deletions
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 52aaed2b936f..c826f15d2f80 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -58,6 +58,7 @@
/* Check SUN_TOP_CTRL base */
ldr \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
ldr \rv, [\rp, #0] @ get register contents
+ARM_BE8( rev \rv, \rv )
and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
/* Chip specific detection starts here */
@@ -98,11 +99,13 @@
.endm
.macro store, rd, rx:vararg
+ARM_BE8( rev \rd, \rd )
str \rd, \rx
.endm
.macro load, rd, rx:vararg
ldr \rd, \rx
+ARM_BE8( rev \rd, \rd )
.endm
.macro senduart,rd,rx
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index 980f5850097c..62a59008c5a8 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -43,6 +43,11 @@ endif
# BCM2835
obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o
+ifeq ($(CONFIG_ARCH_BCM2835),y)
+ifeq ($(CONFIG_ARM),y)
+obj-$(CONFIG_SMP) += platsmp.o
+endif
+endif
# BCM5301X
obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o
diff --git a/arch/arm/mach-bcm/board_bcm2835.c b/arch/arm/mach-bcm/board_bcm2835.c
index 0c1edfc98696..8cff865ace04 100644
--- a/arch/arm/mach-bcm/board_bcm2835.c
+++ b/arch/arm/mach-bcm/board_bcm2835.c
@@ -15,15 +15,11 @@
#include <linux/init.h>
#include <linux/irqchip.h>
#include <linux/of_address.h>
-#include <linux/clk/bcm2835.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-static void __init bcm2835_init(void)
-{
- bcm2835_init_clocks();
-}
+#include "platsmp.h"
static const char * const bcm2835_compat[] = {
#ifdef CONFIG_ARCH_MULTI_V6
@@ -31,11 +27,12 @@ static const char * const bcm2835_compat[] = {
#endif
#ifdef CONFIG_ARCH_MULTI_V7
"brcm,bcm2836",
+ "brcm,bcm2837",
#endif
NULL
};
DT_MACHINE_START(BCM2835, "BCM2835")
- .init_machine = bcm2835_init,
- .dt_compat = bcm2835_compat
+ .dt_compat = bcm2835_compat,
+ .smp = smp_ops(bcm2836_smp_ops),
MACHINE_END
diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c
index 9e3f275934eb..7d954830eb57 100644
--- a/arch/arm/mach-bcm/platsmp.c
+++ b/arch/arm/mach-bcm/platsmp.c
@@ -17,6 +17,7 @@
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/io.h>
+#include <linux/irqchip/irq-bcm2836.h>
#include <linux/jiffies.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -287,6 +288,38 @@ out:
return ret;
}
+static int bcm2836_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ void __iomem *intc_base;
+ struct device_node *dn;
+ char *name;
+
+ name = "brcm,bcm2836-l1-intc";
+ dn = of_find_compatible_node(NULL, NULL, name);
+ if (!dn) {
+ pr_err("unable to find intc node\n");
+ return -ENODEV;
+ }
+
+ intc_base = of_iomap(dn, 0);
+ of_node_put(dn);
+
+ if (!intc_base) {
+ pr_err("unable to remap intc base register\n");
+ return -ENOMEM;
+ }
+
+ writel(virt_to_phys(secondary_startup),
+ intc_base + LOCAL_MAILBOX3_SET0 + 16 * cpu);
+
+ dsb(sy);
+ sev();
+
+ iounmap(intc_base);
+
+ return 0;
+}
+
static const struct smp_operations kona_smp_ops __initconst = {
.smp_prepare_cpus = bcm_smp_prepare_cpus,
.smp_boot_secondary = kona_boot_secondary,
@@ -305,3 +338,8 @@ static const struct smp_operations nsp_smp_ops __initconst = {
.smp_boot_secondary = nsp_boot_secondary,
};
CPU_METHOD_OF_DECLARE(bcm_smp_nsp, "brcm,bcm-nsp-smp", &nsp_smp_ops);
+
+const struct smp_operations bcm2836_smp_ops __initconst = {
+ .smp_boot_secondary = bcm2836_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(bcm_smp_bcm2836, "brcm,bcm2836-smp", &bcm2836_smp_ops);
diff --git a/arch/arm/mach-bcm/platsmp.h b/arch/arm/mach-bcm/platsmp.h
new file mode 100644
index 000000000000..b8b8b3fa350d
--- /dev/null
+++ b/arch/arm/mach-bcm/platsmp.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright (C) 2017 Stefan Wahren <stefan.wahren@i2se.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ */
+
+extern const struct smp_operations bcm2836_smp_ops;