diff options
| author | Paul Walmsley <paul@pwsan.com> | 2012-04-19 13:33:56 -0600 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2012-04-19 13:33:56 -0600 |
| commit | e17f18c007040053babe785f5ba61aa3536bd77d (patch) | |
| tree | 09b7a21f7e279ac738c9e4de8e7fe7e6d9e06729 /arch/arm | |
| parent | 0c6688753f9912c6a7013549ec31c8844020bbc1 (diff) | |
ARM: OMAP4: hwmod data: add OCM RAM IP block
Add the OCM RAM IP block and interconnect data. This is an oh-chip
block of SRAM connected directly to the L3 bus.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index c080fd6c806e..b8e27132e9db 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -281,7 +281,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { * efuse_ctrl_std * mpu_c0 * mpu_c1 - * ocmc_ram * ocp_wp_noc * prcm_mpu * prm @@ -2385,6 +2384,28 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { }; /* + * 'ocmc_ram' class + * top-level core on-chip ram + */ + +static struct omap_hwmod_class omap44xx_ocmc_ram_hwmod_class = { + .name = "ocmc_ram", +}; + +/* ocmc_ram */ +static struct omap_hwmod omap44xx_ocmc_ram_hwmod = { + .name = "ocmc_ram", + .class = &omap44xx_ocmc_ram_hwmod_class, + .clkdm_name = "l3_2_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3_2_OCMC_RAM_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET, + }, + }, +}; + +/* * 'ocp2scp' class * bridge to transform ocp interface protocol to scp (serial control port) * protocol @@ -4964,6 +4985,14 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l3_main_2 -> ocmc_ram */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_ocmc_ram_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_cfg -> ocp2scp_usb_phy */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp2scp_usb_phy = { .master = &omap44xx_l4_cfg_hwmod, @@ -5695,6 +5724,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_per__mmc3, &omap44xx_l4_per__mmc4, &omap44xx_l4_per__mmc5, + &omap44xx_l3_main_2__ocmc_ram, &omap44xx_l4_cfg__ocp2scp_usb_phy, &omap44xx_l3_main_2__sl2if, &omap44xx_l4_abe__slimbus1, |