diff options
| author | Geert Uytterhoeven <geert+renesas@linux-m68k.org> | 2014-02-25 11:30:15 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2014-04-14 11:31:12 +0900 |
| commit | ae8a6146afc9dddbbf342b3a77b9bf44618511dd (patch) | |
| tree | 01a2a8939f7d7159a3c7882749f60a97f56afbd5 /arch/arm | |
| parent | 6f3e4ee340ea11d9aba39c5beaa80f0d3f368428 (diff) | |
ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 9383b8436111..da69afc9e5cb 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -25,6 +25,10 @@ i2c2 = &i2c2; i2c3 = &i2c3; spi0 = &qspi; + spi1 = &msiof0; + spi2 = &msiof1; + spi3 = &msiof2; + spi4 = &msiof3; }; cpus { @@ -776,4 +780,44 @@ #size-cells = <0>; status = "disabled"; }; + + msiof0: spi@e6e20000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6e20000 0 0x0064>; + interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof1: spi@e6e10000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6e10000 0 0x0064>; + interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof2: spi@e6e00000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6e00000 0 0x0064>; + interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof3: spi@e6c90000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6c90000 0 0x0064>; + interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; |