diff options
| author | Marc Zyngier <maz@kernel.org> | 2019-01-02 12:34:25 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-07-07 09:28:37 +0100 |
| commit | efaa5b93afde088411b67a0dde34e67aedc6e72f (patch) | |
| tree | 5f160be703849abc5a12dba27dfa05ae758ffffe /arch/arm64/kvm/hyp/vhe | |
| parent | a0e50aa3f4a8a5c9fb791b8f32d624e2a1a735bd (diff) | |
KVM: arm64: Use TTL hint in when invalidating stage-2 translations
Since we often have a precise idea of the level we're dealing with
when invalidating TLBs, we can provide it to as a hint to our
invalidation helper.
Reviewed-by: James Morse <james.morse@arm.com>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/kvm/hyp/vhe')
| -rw-r--r-- | arch/arm64/kvm/hyp/vhe/tlb.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm64/kvm/hyp/vhe/tlb.c b/arch/arm64/kvm/hyp/vhe/tlb.c index ada1d56f0709..fd7895945bbc 100644 --- a/arch/arm64/kvm/hyp/vhe/tlb.c +++ b/arch/arm64/kvm/hyp/vhe/tlb.c @@ -79,7 +79,8 @@ static void __tlb_switch_to_host(struct tlb_inv_context *cxt) local_irq_restore(cxt->flags); } -void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, phys_addr_t ipa) +void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, + phys_addr_t ipa, int level) { struct tlb_inv_context cxt; @@ -94,7 +95,7 @@ void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, phys_addr_t ipa) * whole of Stage-1. Weep... */ ipa >>= 12; - __tlbi(ipas2e1is, ipa); + __tlbi_level(ipas2e1is, ipa, level); /* * We have to ensure completion of the invalidation at Stage-2, |