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authorWill Deacon <will.deacon@arm.com>2015-02-03 16:14:13 +0000
committerWill Deacon <will.deacon@arm.com>2015-07-27 15:28:50 +0100
commitc09d6a04d17d730b0463207a26ece082772b59ee (patch)
tree43aec4a96946d28bc0fd985b1219317bdcb2b8d2 /arch/arm64/kernel
parentc0385b24af15020a1e505f2c984db0d7c0d017e1 (diff)
arm64: atomics: patch in lse instructions when supported by the CPU
On CPUs which support the LSE atomic instructions introduced in ARMv8.1, it makes sense to use them in preference to ll/sc sequences. This patch introduces runtime patching of atomic_t and atomic64_t routines so that the call-site for the out-of-line ll/sc sequences is patched with an LSE atomic instruction when we detect that the CPU supports it. If binutils is not recent enough to assemble the LSE instructions, then the ll/sc sequences are inlined as though CONFIG_ARM64_LSE_ATOMICS=n. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
-rw-r--r--arch/arm64/kernel/setup.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index f4fbbc884893..97785c01acbf 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -285,6 +285,9 @@ static void __init setup_processor(void)
case 2:
elf_hwcap |= HWCAP_ATOMICS;
cpus_set_cap(ARM64_CPU_FEAT_LSE_ATOMICS);
+ if (IS_ENABLED(CONFIG_AS_LSE) &&
+ IS_ENABLED(CONFIG_ARM64_LSE_ATOMICS))
+ pr_info("LSE atomics supported\n");
case 1:
/* RESERVED */
case 0: