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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-01-28 17:43:30 +0000
committerAndy Gross <andy.gross@linaro.org>2016-02-24 00:14:03 -0600
commit93a35141826a67b781cd3a4179577eed188cc321 (patch)
treec64594c9846fafbe8a284ef0f5bea8f7202e85c4 /arch/arm64/boot
parentdf984b8b5a8d248a59a0aa3496af4eb0aa927712 (diff)
arm64: dts: qcom: add correct drive strenght on cs pins
2mA drive strenght is not enough to drive chipselect low on hardware configurations with level shifters, 16mA should give good range to allow such configurations to work. This issue was noticed while testing spi on db410c with sensor board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916-pins.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 3bd917e48a8a..c17cd8bd7c9f 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -82,7 +82,7 @@
};
pinconf_cs {
pins = "gpio2";
- drive-strength = <2>;
+ drive-strength = <16>;
bias-disable;
output-high;
};
@@ -116,7 +116,7 @@
};
pinconf_cs {
pins = "gpio6";
- drive-strength = <2>;
+ drive-strength = <16>;
bias-disable;
output-high;
};
@@ -150,7 +150,7 @@
};
pinconf_cs {
pins = "gpio10";
- drive-strength = <2>;
+ drive-strength = <16>;
bias-disable;
output-high;
};
@@ -184,7 +184,7 @@
};
pinconf_cs {
pins = "gpio14";
- drive-strength = <2>;
+ drive-strength = <16>;
bias-disable;
output-high;
};
@@ -218,7 +218,7 @@
};
pinconf_cs {
pins = "gpio18";
- drive-strength = <2>;
+ drive-strength = <16>;
bias-disable;
output-high;
};
@@ -252,7 +252,7 @@
};
pinconf_cs {
pins = "gpio22";
- drive-strength = <2>;
+ drive-strength = <16>;
bias-disable;
output-high;
};