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authorThierry Reding <treding@nvidia.com>2016-08-19 16:07:15 +0200
committerThierry Reding <treding@nvidia.com>2016-11-21 10:43:39 +0100
commit40cc83b34cb81aa40656f944563f3cc7d6466b2b (patch)
treeab72445b1e4a0ff60186d874d3238f6f983834b5 /arch/arm64/boot
parenta7a77e2e83dda6da54f6de19881390c568335cea (diff)
arm64: tegra: Add I2C controllers on Tegra186
Tegra186 has a total of nine I2C controllers that are compatible with the I2C controllers introduced in Tegra114. Two of these controllers share pads with two DPAUX controllers (for AUX transactions). Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186.dtsi120
1 files changed, 120 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index f3d60cb6a36c..65d6b97647cf 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -66,6 +66,100 @@
status = "disabled";
};
+ gen1_i2c: i2c@3160000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x03160000 0x0 0x10000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 47>;
+ clock-names = "div-clk";
+ resets = <&bpmp 19>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
+ cam_i2c: i2c@3180000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x03180000 0x0 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 75>;
+ clock-names = "div-clk";
+ resets = <&bpmp 21>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
+ /* shares pads with dpaux1 */
+ dp_aux_ch1_i2c: i2c@3190000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x03190000 0x0 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 86>;
+ clock-names = "div-clk";
+ resets = <&bpmp 22>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
+ /* controlled by BPMP, should not be enabled */
+ pwr_i2c: i2c@31a0000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x031a0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 48>;
+ clock-names = "div-clk";
+ resets = <&bpmp 23>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
+ /* shares pads with dpaux0 */
+ dp_aux_ch0_i2c: i2c@31b0000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x031b0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 125>;
+ clock-names = "div-clk";
+ resets = <&bpmp 24>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
+ gen7_i2c: i2c@31c0000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x031c0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 182>;
+ clock-names = "div-clk";
+ resets = <&bpmp 81>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
+ gen9_i2c: i2c@31e0000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x031e0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 183>;
+ clock-names = "div-clk";
+ resets = <&bpmp 83>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
gic: interrupt-controller@3881000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@@ -86,6 +180,32 @@
status = "disabled";
};
+ gen2_i2c: i2c@c240000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x0c240000 0x0 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 218>;
+ clock-names = "div-clk";
+ resets = <&bpmp 20>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
+ gen8_i2c: i2c@c250000 {
+ compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+ reg = <0x0 0x0c250000 0x0 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp 219>;
+ clock-names = "div-clk";
+ resets = <&bpmp 82>;
+ reset-names = "i2c";
+ status = "disabled";
+ };
+
uartc: serial@c280000 {
compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
reg = <0x0 0x0c280000 0x0 0x40>;