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authorArnd Bergmann <arnd@arndb.de>2020-06-02 20:45:53 +0200
committerArnd Bergmann <arnd@arndb.de>2020-06-02 20:45:53 +0200
commit9ad249abe7b8f6f0d2d876bde860b1c511d71d7b (patch)
tree9b0b2ec0ec4b83b5f4b97b12b4e181fce81f0808 /arch/arm64/boot/dts
parent603986a7a486a041e82146f6fce5ac6439858b2a (diff)
parent818227321d331c583c4563a8275eb187b98475df (diff)
Merge tag 'zynqmp-dt-for-v5.8' of https://github.com/Xilinx/linux-xlnx into arm/dt
arm64: dt: ZynqMP DT fixes for v5.8 - Add AES mode and fix GIC node * tag 'zynqmp-dt-for-v5.8' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Fix GIC compatible property arm64: zynqmp: Add Xilinx AES node Link: https://lore.kernel.org/r/ad25cfb0-156c-9bf6-a7b8-e30a7a859135@monstr.eu Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp.dtsi6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 26d926eb1431..9174ddc76bdc 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -158,6 +158,10 @@
zynqmp_pcap: pcap {
compatible = "xlnx,zynqmp-pcap-fpga";
};
+
+ xlnx_aes: zynqmp-aes {
+ compatible = "xlnx,zynqmp-aes";
+ };
};
};
@@ -185,7 +189,7 @@
ranges = <0 0 0 0 0xffffffff>;
gic: interrupt-controller@f9010000 {
- compatible = "arm,gic-400", "arm,cortex-a15-gic";
+ compatible = "arm,gic-400";
#interrupt-cells = <3>;
reg = <0x0 0xf9010000 0x10000>,
<0x0 0xf9020000 0x20000>,