diff options
| author | Guido Günther <agx@sigxcpu.org> | 2019-08-22 13:10:23 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2019-08-24 22:47:07 +0200 |
| commit | 215701807e53a379e1c9b2e6401676779ef85ea0 (patch) | |
| tree | 12c3069ecc0ffe19c9d99e60fa4db5cd4021219d /arch/arm64/boot/dts | |
| parent | ffe0f9a0baf9f10135ea272ef4d944179d106d59 (diff) | |
arm64: dts: imx8mq: Add mux controller to iomuxc_gpr
The only mux controls the MIPI DSI input selection.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index f5d4b12a5fa8..c51d571c05e4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -440,8 +440,15 @@ }; iomuxc_gpr: syscon@30340000 { - compatible = "fsl,imx8mq-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon"; + compatible = "fsl,imx8mq-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", + "syscon", "simple-mfd"; reg = <0x30340000 0x10000>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */ + }; }; ocotp: ocotp-ctrl@30350000 { |