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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-04-21 15:01:09 +0900
committerArnd Bergmann <arnd@arndb.de>2016-04-25 22:57:54 +0200
commitfb89cf36b6041ac87ad75ad0f5f23b2643fc6f97 (patch)
treeb4e430dc2ef232955edd1cc23641ed0c07e879ef /arch/arm64/boot/dts/socionext
parentb455f0a1cc51f35a9e714554c6e3234fd806ce02 (diff)
arm64: dts: uniphier: add reference clock node for PH1-LD20
Add a master clock node generated by a 25MHz crystal oscillator. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/socionext')
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index e682a3f52791..8b908cd7eb04 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -106,6 +106,12 @@
};
clocks {
+ refclk: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
uart_clk: uart_clk {
#clock-cells = <0>;
compatible = "fixed-clock";