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authorJohan Jonker <jbx6244@gmail.com>2021-01-22 18:12:43 +0100
committerHeiko Stuebner <heiko@sntech.de>2021-02-01 19:00:31 +0100
commit5b9312109135b68b78b5a8e20d8f78b6bd9fb4fa (patch)
treeb91350e70696fd1405278503848f9a870f8df566 /arch/arm64/boot/dts/rockchip/rk3399.dtsi
parent1e58ba111421375c5948c3e8145bdd84b06ac095 (diff)
arm64: dts: rockchip: fix ranges property format for rk3399 pcie node
A test with the command below gives for example this error: /arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: pcie@f8000000: ranges: 'oneOf' conditional failed, one must be fixed: The pcie ranges property is an array. The dt-check expects that each array item is wrapped with angle brackets, so fix that ranges property format for the rk3399 pcie node. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/ schemas/pci/pci-bus.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210122171243.16138-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4983dd18b4d8..fba9bcb3a08d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -259,8 +259,8 @@
<&pcie_phy 2>, <&pcie_phy 3>;
phy-names = "pcie-phy-0", "pcie-phy-1",
"pcie-phy-2", "pcie-phy-3";
- ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000
- 0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
+ ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
+ <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
<&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,