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authorAdam Ford <aford173@gmail.com>2020-12-24 11:04:59 -0600
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-01-11 10:01:29 +0100
commit33aaab6d5c634784ecf5612e7ac11346adac8d6b (patch)
tree8c42d9cf66f2dc9d6b609a712d2871b7fd0c3473 /arch/arm64/boot/dts/renesas
parente718d563750db293e84f826be9e7ab49d8e4b97e (diff)
arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions
In preparation for adding new dev kits, move anything specific to the RZ/G2M from the SOM-level and baseboard-levels and move them to the kit-level. This allows the SOM and baseboard to be reused with other SoC's. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201224170502.2254683-6-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
-rw-r--r--arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi15
-rw-r--r--arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi5
-rw-r--r--arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts20
3 files changed, 20 insertions, 20 deletions
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index ae0f58eb2be8..30c169b08536 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -264,21 +264,6 @@
status = "okay";
};
-&du {
- pinctrl-0 = <&du_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>,
- <&versaclock5 1>,
- <&x302_clk>,
- <&versaclock5 2>;
- clock-names = "du.0", "du.1", "du.2",
- "dclkin.0", "dclkin.1", "dclkin.2";
-};
-
&du_out_rgb {
remote-endpoint = <&rgb_panel>;
};
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
index 6e74c391860c..f4201e1c2226 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
@@ -13,11 +13,6 @@
reg = <0x0 0x48000000 0x0 0x78000000>;
};
- memory@600000000 {
- device_type = "memory";
- reg = <0x6 0x00000000 0x0 0x80000000>;
- };
-
osc_32k: osc_32k {
compatible = "fixed-clock";
#clock-cells = <0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts
index 25eeac411f12..501cb05da228 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts
@@ -26,6 +26,26 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x80000000>;
+ };
+};
+
+&du {
+ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&versaclock5 1>,
+ <&x302_clk>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.2",
+ "dclkin.0", "dclkin.1", "dclkin.2";
};
/* Reference versaclock instead of audio_clk_a */