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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2020-08-12 15:02:17 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-08-17 09:46:33 +0200
commit2e23a1db4840e6adf4072802d4d91edf4a375b90 (patch)
treef8fddd9624b67c1e046d3651fcac4292c9b7c028 /arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
parent112441c24bcdf806335ae0f52e1b4107c6a962ec (diff)
arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks
Setup up the required clocks for the DU to be functional. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200812140217.24251-10-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts b/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
index cdbe527e9340..12f9242e263b 100644
--- a/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
@@ -24,3 +24,14 @@
reg = <0x5 0x00000000 0x0 0x80000000>;
};
};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 721>,
+ <&versaclock5 1>,
+ <&x302_clk>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.3",
+ "dclkin.0", "dclkin.1", "dclkin.3";
+};