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author | Olof Johansson <olof@lixom.net> | 2017-09-05 20:41:43 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2017-09-05 20:41:43 -0700 |
commit | b884026a2b80529fc7a4de729b92ee0ba555bfed (patch) | |
tree | 2209b3faf920ff1f7cc5e78645aea5e04bac2c14 /arch/arm64/boot/dts/marvell/armada-37xx.dtsi | |
parent | e3e36ab37c9eac0f2a821806fea05c64f367304b (diff) | |
parent | c911171a7488c0028cfa05f2cf52f0067c7c880b (diff) |
Merge branch 'next/dt64' into next/dt
* next/dt64: (233 commits)
arm64: dts: marvell: mcbin: enable more networking ports
arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
arm64: dts: marvell: add TX interrupts for PPv2.2
arm64: dts: uniphier: add PXs3 SoC support
arm64: dts: uniphier: fix size of sdctrl node
arm64: dts: uniphier: add AIDET nodes
arm64: dts: uniphier: add reset controller node of analog amplifier
arm64: dts: marvell: add Device Tree files for Armada-8KP
arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM
arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM
dt-bindings: add rk3399-q7 SoM
arm64: dts: rockchip: add rk3328-rock64 board
arm64: dts: rockchip: add rk3328 pdm node
ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names
ARM64: dts: meson-gx: Add AO CEC nodes
ARM64: dts: meson-gx: update AO clkc to new bindings
arm64: dts: rockchip: add more rk3399 iommu nodes
arm64: dts: rockchip: add rk3368 iommu nodes
arm64: dts: rockchip: add rk3328 iommu nodes
arm64: zynqmp: Add generic compatible string for I2C EEPROM
...
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-37xx.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 51763d674050..8c0cf7efac65 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -81,6 +81,11 @@ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -322,7 +327,11 @@ #interrupt-cells = <3>; interrupt-controller; reg = <0x1d00000 0x10000>, /* GICD */ - <0x1d40000 0x40000>; /* GICR */ + <0x1d40000 0x40000>, /* GICR */ + <0x1d80000 0x2000>, /* GICC */ + <0x1d90000 0x2000>, /* GICH */ + <0x1da0000 0x20000>; /* GICV */ + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; }; |