diff options
| author | Neil Armstrong <narmstrong@baylibre.com> | 2016-11-07 11:43:55 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2016-11-15 12:05:46 -0800 |
| commit | e9e27c647cb063b3b0e58d40414852bb00980171 (patch) | |
| tree | 214333d9290139c2c6427008ff268c519e463dfc /arch/arm64/boot/dts/amlogic | |
| parent | 0e26f26ff3dff94a7f87d67cd2bfa1219fb9368b (diff) | |
ARM64: dts: meson-gxl: Add ethernet nodes with internal PHY
Add Ethernet node with Internal PHY selection for the Amlogic GXL SoCs
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic')
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 73887fe91d42..9f89b99c4806 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -49,6 +49,22 @@ compatible = "amlogic,meson-gxl"; }; +ðmac { + reg = <0x0 0xc9410000 0x0 0x10000 + 0x0 0xc8834540 0x0 0x4>; + + clocks = <&clkc CLKID_ETH>, + <&clkc CLKID_FCLK_DIV2>, + <&clkc CLKID_MPLL2>; + clock-names = "stmmaceth", "clkin0", "clkin1"; + + mdio0: mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + }; +}; + &aobus { pinctrl_aobus: pinctrl@14 { compatible = "amlogic,meson-gxl-aobus-pinctrl"; @@ -214,6 +230,33 @@ }; }; }; + + eth-phy-mux { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x55c 0x0 0x4>; + mux-mask = <0xffffffff>; + mdio-parent-bus = <&mdio0>; + + internal_mdio: mdio@e40908ff { + reg = <0xe40908ff>; + #address-cells = <1>; + #size-cells = <0>; + + internal_phy: ethernet-phy@8 { + compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22"; + reg = <8>; + max-speed = <100>; + }; + }; + + external_mdio: mdio@2009087f { + reg = <0x2009087f>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; &hiubus { |