diff options
author | Naveen Krishna Chatradhi <ch.naveen@samsung.com> | 2011-07-18 14:44:19 +0900 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-07-21 02:10:04 +0900 |
commit | 65f5eaa27a0c18ab79489b2fcbaf28d97c45101a (patch) | |
tree | 60da2ca55bd8fa21e3dbf7e845a21a3dc8ff70e8 /arch/arm/plat-s5p | |
parent | 696f6fc1be92a8e117b4d07de34bf2d514a9c079 (diff) |
ARM: SAMSUNG: Move duplicate code for SPDIF ops
Move the duplicated code for SPDIF ops from S5PV210 and S5PC100.
So, the same can be used in EXYNOS4.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r-- | arch/arm/plat-s5p/clock.c | 35 | ||||
-rw-r--r-- | arch/arm/plat-s5p/include/plat/s5p-clock.h | 5 |
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c index 8d081d968c58..02af235298e2 100644 --- a/arch/arm/plat-s5p/clock.c +++ b/arch/arm/plat-s5p/clock.c @@ -168,6 +168,41 @@ unsigned long s5p_epll_get_rate(struct clk *clk) return clk->rate; } +int s5p_spdif_set_rate(struct clk *clk, unsigned long rate) +{ + struct clk *pclk; + int ret; + + pclk = clk_get_parent(clk); + if (IS_ERR(pclk)) + return -EINVAL; + + ret = pclk->ops->set_rate(pclk, rate); + clk_put(pclk); + + return ret; +} + +unsigned long s5p_spdif_get_rate(struct clk *clk) +{ + struct clk *pclk; + int rate; + + pclk = clk_get_parent(clk); + if (IS_ERR(pclk)) + return -EINVAL; + + rate = pclk->ops->get_rate(clk); + clk_put(pclk); + + return rate; +} + +struct clk_ops s5p_sclk_spdif_ops = { + .set_rate = s5p_spdif_set_rate, + .get_rate = s5p_spdif_get_rate, +}; + static struct clk *s5p_clks[] __initdata = { &clk_ext_xtal_mux, &clk_48m, diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h index 2b6dcff8ab2b..769b5bdfb046 100644 --- a/arch/arm/plat-s5p/include/plat/s5p-clock.h +++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h @@ -47,4 +47,9 @@ extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); extern int s5p_epll_enable(struct clk *clk, int enable); extern unsigned long s5p_epll_get_rate(struct clk *clk); +/* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */ +extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); +extern unsigned long s5p_spdif_get_rate(struct clk *clk); + +extern struct clk_ops s5p_sclk_spdif_ops; #endif /* __ASM_PLAT_S5P_CLOCK_H */ |