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authorKishon Vijay Abraham I <kishon@ti.com>2012-07-04 05:09:21 -0600
committerPaul Walmsley <paul@pwsan.com>2012-07-04 05:09:21 -0600
commit6668546f3bb4cc0dde75ac1ef1d436b67e4ef638 (patch)
treedc14b9f2dcfdd095fcd3ba632c8e4ab81f179c93 /arch/arm/plat-s3c24xx
parent3f4990f44a5dcf15a053a041c813fa73ffa75608 (diff)
ARM: OMAP2+: hwmod code: add support to set dmadisable in hwmod framework
The DMADISABLE bit is a semi-automatic bit present in sysconfig register of some modules. When the DMA must perform read/write accesses, the DMADISABLE bit is cleared by the hardware. But when the DMA must stop for power management, software must set the DMADISABLE bit back to 1. In cases where the ROMCODE/BOOTLOADER uses dma, the hardware clears the DMADISABLE bit (but the romcode/bootloader might not set it back to 1). In order for the kernel to start in a clean state, it is necessary for the kernel to set DMADISABLE bit back to 1 (irrespective of whether it's been set to 1 in romcode or bootloader). During _reset of the (hwmod)device, the DMADISABLE bit is set so that it does not prevent idling of the system. (NOTE: having DMADISABLE to 0, prevents the system to idle) DMADISABLE bit is present in usbotgss module of omap5. Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [paul@pwsan.com: updated to apply; fixed checkpatch warnings] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
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