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authorTony Lindgren <tony@atomide.com>2010-08-02 14:23:38 +0300
committerTony Lindgren <tony@atomide.com>2010-08-02 14:23:38 +0300
commit055a1b8c9927bc587f293020a54c6cd8e24dfac0 (patch)
treedb7c8d00931180c4896c9e00d2cb506939592cda /arch/arm/plat-omap
parent8a6f7e14fc3b3ea911838c3f4ce137cb8a3d134a (diff)
parentf535daed925c2d3c1db06b06a63c4955f2c51988 (diff)
Merge branch 'devel-misc' into omap-for-linus
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/dma.c11
-rw-r--r--arch/arm/plat-omap/gpio.c4
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h2
-rw-r--r--arch/arm/plat-omap/include/plat/dma.h1
-rw-r--r--arch/arm/plat-omap/include/plat/mux.h4
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h6
6 files changed, 23 insertions, 5 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index f7f571e7987e..ec7eddf9e525 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
val = dma_read(CCR(lch));
/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
- val &= ~((3 << 19) | 0x1f);
+ val &= ~((1 << 23) | (3 << 19) | 0x1f);
val |= (dma_trigger & ~0x1f) << 14;
val |= dma_trigger & 0x1f;
@@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
else
val &= ~(1 << 18);
- if (src_or_dst_synch)
+ if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
+ val &= ~(1 << 24); /* dest synch */
+ val |= (1 << 23); /* Prefetch */
+ } else if (src_or_dst_synch) {
val |= 1 << 24; /* source synch */
- else
+ } else {
val &= ~(1 << 24); /* dest synch */
-
+ }
dma_write(val, CCR(lch));
}
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9b7e3545f325..7951eefe1a0e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -390,7 +390,9 @@ static inline int gpio_valid(int gpio)
return 0;
if (cpu_is_omap7xx() && gpio < 192)
return 0;
- if (cpu_is_omap24xx() && gpio < 128)
+ if (cpu_is_omap2420() && gpio < 128)
+ return 0;
+ if (cpu_is_omap2430() && gpio < 160)
return 0;
if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && gpio < 192)
return 0;
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 75141742300c..aa2f4f079f57 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -444,6 +444,7 @@ extern u32 omap3_features;
#define OMAP3_HAS_NEON BIT(3)
#define OMAP3_HAS_ISP BIT(4)
#define OMAP3_HAS_192MHZ_CLK BIT(5)
+#define OMAP3_HAS_IO_WAKEUP BIT(6)
#define OMAP3_HAS_FEATURE(feat,flag) \
static inline unsigned int omap3_has_ ##feat(void) \
@@ -457,5 +458,6 @@ OMAP3_HAS_FEATURE(iva, IVA)
OMAP3_HAS_FEATURE(neon, NEON)
OMAP3_HAS_FEATURE(isp, ISP)
OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
+OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
#endif
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 02232ca2c37f..af3a03941add 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -345,6 +345,7 @@
#define OMAP_DMA_SYNC_BLOCK 0x02
#define OMAP_DMA_SYNC_PACKET 0x03
+#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
#define OMAP_DMA_SRC_SYNC 0x01
#define OMAP_DMA_DST_SYNC 0x00
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h
index e1da7b17d25b..aeba71796ad9 100644
--- a/arch/arm/plat-omap/include/plat/mux.h
+++ b/arch/arm/plat-omap/include/plat/mux.h
@@ -173,6 +173,10 @@ enum omap7xx_index {
SPI_7XX_4,
SPI_7XX_5,
SPI_7XX_6,
+
+ /* UART */
+ UART_7XX_1,
+ UART_7XX_2,
};
enum omap1xxx_index {
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index bbedd71943f6..ddf723be48dc 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -25,6 +25,8 @@
#include <plat/serial.h>
+#define MDR1_MODE_MASK 0x07
+
static volatile u8 *uart_base;
static int uart_shift;
@@ -42,6 +44,10 @@ static void putc(int c)
if (!uart_base)
return;
+ /* Check for UART 16x mode */
+ if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
+ return;
+
while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
barrier();
uart_base[UART_TX << uart_shift] = c;