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author | Fabio Estevam <fabio.estevam@freescale.com> | 2011-06-20 10:37:13 -0300 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-07-07 09:06:57 +0200 |
commit | b2a08e3e46f594ad605c9b5f5fce6b9f36a9a3eb (patch) | |
tree | 6c435bdeb944b7587cd9045ea70914831dc00fb6 /arch/arm/plat-mxc | |
parent | 98618cfe22a5dbb87c0deb341734436aeecd51bf (diff) |
ARM: mach-imx/mx31_3ds: Fix IOMUX for SPI1 signals
Original code was assuming that the CSPI1 pins on the
MX31PDK were the primary pin function, which is incorrect.
On MX31PDK board these are the pins that provide CSPI1 functionality:
DSR_DCE1 (ALT mode 1) --> CSPI1_CLK
RI_DCE1 (ALT mode 1) --> CSPI1_RDY
DTR_DTE1 -->CSI1_MOSI
DSR_DTE1 --> CSPI1_MISO
DTR_DCE2 ---> CSPI1_SS2
The 3 IOMUX settings above are done via GPR as per Table A-1 of the MX31RM.
This patch fixes the CSPI1 IOMUX and makes the LCD to be functional.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
0 files changed, 0 insertions, 0 deletions