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authorStephen Warren <swarren@nvidia.com>2012-10-23 11:40:25 -0600
committerStephen Warren <swarren@nvidia.com>2012-11-16 12:22:17 -0700
commit3a04931e3b6230926ebe200192545a8d952d787d (patch)
treedfd80f9f4d3219c49ee62f8bd2e5c3448aaa0930 /arch/arm/mach-tegra
parent56415480e90a6ba31e9fdda2cc860c3fcaa80acc (diff)
ARM: tegra: enhance timer.c to get IO address from device tree
Modify Tegra's timer code to parse the IO address from device tree, hence removing the dependency on <mach/iomap.h>. This will allow the driver to be moved to drivers/clocksource/. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/timer.c32
1 files changed, 28 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 026bad4ac57a..e4863f3e9ee7 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -26,6 +26,7 @@
#include <linux/clocksource.h>
#include <linux/clk.h>
#include <linux/io.h>
+#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <asm/mach/time.h>
@@ -33,8 +34,6 @@
#include <asm/sched_clock.h>
#include "board.h"
-#include "clock.h"
-#include "iomap.h"
#define RTC_SECONDS 0x08
#define RTC_SHADOW_SECONDS 0x0c
@@ -52,8 +51,8 @@
#define TIMER_PTV 0x0
#define TIMER_PCR 0x4
-static void __iomem *timer_reg_base = IO_ADDRESS(TEGRA_TMR1_BASE);
-static void __iomem *rtc_base = IO_ADDRESS(TEGRA_RTC_BASE);
+static void __iomem *timer_reg_base;
+static void __iomem *rtc_base;
static struct timespec persistent_ts;
static u64 persistent_ms, last_persistent_ms;
@@ -164,6 +163,11 @@ static const struct of_device_id timer_match[] __initconst = {
{}
};
+static const struct of_device_id rtc_match[] __initconst = {
+ { .compatible = "nvidia,tegra20-rtc" },
+ {}
+};
+
static void __init tegra_init_timer(void)
{
struct device_node *np;
@@ -177,6 +181,12 @@ static void __init tegra_init_timer(void)
BUG();
}
+ timer_reg_base = of_iomap(np, 0);
+ if (!timer_reg_base) {
+ pr_err("Can't map timer registers");
+ BUG();
+ }
+
tegra_timer_irq.irq = irq_of_parse_and_map(np, 2);
if (tegra_timer_irq.irq <= 0) {
pr_err("Failed to map timer IRQ\n");
@@ -192,6 +202,20 @@ static void __init tegra_init_timer(void)
rate = clk_get_rate(clk);
}
+ of_node_put(np);
+
+ np = of_find_matching_node(NULL, rtc_match);
+ if (!np) {
+ pr_err("Failed to find RTC DT node\n");
+ BUG();
+ }
+
+ rtc_base = of_iomap(np, 0);
+ if (!rtc_base) {
+ pr_err("Can't map RTC registers");
+ BUG();
+ }
+
/*
* rtc registers are used by read_persistent_clock, keep the rtc clock
* enabled