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authorOlof Johansson <olof@lixom.net>2014-10-23 21:05:45 -0700
committerOlof Johansson <olof@lixom.net>2014-10-23 21:05:45 -0700
commit4fbc400cfc56fb6cb62197ff2244696770251bdf (patch)
tree03b2a63ce8e9db0f6e7c84f098f87ccccecb51db /arch/arm/mach-socfpga/core.h
parent184f84d9b94e142009835bd872f180c5264fbeeb (diff)
parentefb4a44e24df2b98464977aee5be41148936fc7c (diff)
Merge tag 'socfpga_fixes_for_3.18' of git://git.rocketboards.org/linux-socfpga-next into fixes
Merge "SOCFPGA fixes for 3.18" from Dinh Nguyen: These patches fixes an SMP and SDMMC driver hang during boot up on the SOCFPGA platform. Patch "arm: socfpga: fix fetching cpu1start_addr for SMP" fixes the SMP trampoline code in order for CPU1 to correctly fetch it's cpu1start_addr. Patch "ARM: dts: socfpga: rename gpio nodes" renames that GPIO node in order to allow a standard way of specifying status="okay" in the board DTS file. Patch "ARM: dts: socfpga: Fix SD card detect" fixes a SDMMC driver hang during boot. The reason for the hang was the deferred probe of the SDMMC driver was waiting for the GPIO resource that would never come. Patch "ARM: dts: socfpga: Add a 3.3V fixed regulator node" adds a fixed regulator node for the SDMMC driver to use. * tag 'socfpga_fixes_for_3.18' of git://git.rocketboards.org/linux-socfpga-next: ARM: dts: socfpga: Add a 3.3V fixed regulator node ARM: dts: socfpga: Fix SD card detect ARM: dts: socfpga: rename gpio nodes arm: socfpga: fix fetching cpu1start_addr for SMP Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-socfpga/core.h')
-rw-r--r--arch/arm/mach-socfpga/core.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 572b8f719ffb..60c443dadb58 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -40,7 +40,7 @@ extern void __iomem *rst_manager_base_addr;
extern struct smp_operations socfpga_smp_ops;
extern char secondary_trampoline, secondary_trampoline_end;
-extern unsigned long cpu1start_addr;
+extern unsigned long socfpga_cpu1start_addr;
#define SOCFPGA_SCU_VIRT_BASE 0xfffec000