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authorArnd Bergmann <arnd@arndb.de>2013-06-20 02:14:59 +0200
committerArnd Bergmann <arnd@arndb.de>2013-06-20 02:15:45 +0200
commite5051b8472c2fde91e44d906c9a2e516a10b60b2 (patch)
treeb7c27378ca981a7bcf86639db7b0cde834feb0b6 /arch/arm/mach-omap2
parentc3b693d1d63444afe4fbf809d8a311b63741e503 (diff)
parent3bfbc6cd9b41f937a134ba65a4a1eefba062b9a8 (diff)
Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo: imx soc changes for 3.11: * New SoCs i.MX6 Sololite and Vybrid VF610 support * imx5 and imx6 clock fixes and additions * Update clock driver to use of_clk_init() function * Refactor restart routine mxc_restart() to get it work for DT boot as well * Clean up mxc specific ulpi access ops * imx defconfig updates * tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (29 commits) ARM: imx_v6_v7_defconfig: Enable Vybrid VF610 ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd ARM: imx_v6_v7_defconfig: Enable PWM and backlight options ARM: imx: Remove mxc specific ulpi access ops ARM: imx: add initial support for VF610 ARM: imx: add VF610 clock support ARM: imx_v6_v7_defconfig: enable parallel display ARM: imx: clk: No need to initialize phandle struct ARM: imx: irq-common: Include header to avoid sparse warning ARM: imx: Enable mx6 solo-lite support ARM: imx6: use common of_clk_init() call to initialize clocks ARM: imx6q: call of_clk_init() to register fixed rate clocks ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVE ARM: i.MX6: clk: add different DualLite MLB clock config ARM i.MX5: Add S/PDIF clocks ARM i.MX53: Add SATA clock ARM: imx6q: clk: add the eim_slow clock ARM: imx: remove MLB PLL from pllv3 ARM: imx: disable pll8_mlb in mx6q_clks ... Conflicts: arch/arm/Kconfig.debug (simple add/add conflict) Includes an update to 3.10-rc6 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clock36xx.c18
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c9
-rw-r--r--arch/arm/mach-omap2/pm34xx.c6
3 files changed, 21 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 8f3bf4e50908..bbd6a3f717e6 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -20,11 +20,12 @@
#include <linux/kernel.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/io.h>
#include "clock.h"
#include "clock36xx.h"
-
+#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
/**
* omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
@@ -39,29 +40,28 @@
*/
int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
{
- struct clk_hw_omap *parent;
+ struct clk_divider *parent;
struct clk_hw *parent_hw;
- u32 dummy_v, orig_v, clksel_shift;
+ u32 dummy_v, orig_v;
int ret;
/* Clear PWRDN bit of HSDIVIDER */
ret = omap2_dflt_clk_enable(clk);
parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
- parent = to_clk_hw_omap(parent_hw);
+ parent = to_clk_divider(parent_hw);
/* Restore the dividers */
if (!ret) {
- clksel_shift = __ffs(parent->clksel_mask);
- orig_v = __raw_readl(parent->clksel_reg);
+ orig_v = __raw_readl(parent->reg);
dummy_v = orig_v;
/* Write any other value different from the Read value */
- dummy_v ^= (1 << clksel_shift);
- __raw_writel(dummy_v, parent->clksel_reg);
+ dummy_v ^= (1 << parent->shift);
+ __raw_writel(dummy_v, parent->reg);
/* Write the original divider */
- __raw_writel(orig_v, parent->clksel_reg);
+ __raw_writel(orig_v, parent->reg);
}
return ret;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 1e2a6fb835c2..0c9a183131e2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2008,6 +2008,13 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
},
};
+/* uart2 */
+static struct omap_hwmod_dma_info uart2_edma_reqs[] = {
+ { .name = "tx", .dma_req = 28, },
+ { .name = "rx", .dma_req = 29, },
+ { .dma_req = -1 }
+};
+
static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = {
{ .irq = 73 + OMAP_INTC_START, },
{ .irq = -1 },
@@ -2019,7 +2026,7 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
.mpu_irqs = am33xx_uart2_irqs,
- .sdma_reqs = uart1_edma_reqs,
+ .sdma_reqs = uart2_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c01859398b54..5a2d8034c8de 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -546,8 +546,10 @@ static void __init prcm_setup_regs(void)
/* Clear any pending PRCM interrupts */
omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
- if (omap3_has_iva())
- omap3_iva_idle();
+ /*
+ * We need to idle iva2_pwrdm even on am3703 with no iva2.
+ */
+ omap3_iva_idle();
omap3_d2d_idle();
}