diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-07-21 23:22:35 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-07-21 23:22:35 +0200 |
| commit | 2d05bf6ef7391ac3642ab62bc3a649fdb32731fe (patch) | |
| tree | a8671f0eafa885b4f3ad05204e3ed642b6acab59 /arch/arm/mach-mv78xx0 | |
| parent | 9c63cd5a955ce8a3de1776a9e4b6b89c69b2a09e (diff) | |
| parent | 8c0383b8f6a8012b107cd62eaa5a556586d8ea56 (diff) | |
Merge branch 'samsung/defconfig' into next/defconfig
From Kukjin Kim <kgene.kim@samsung.com>:
It is including new exynos_defconfig for DT configuration of exynos4
and exynos5 together. The old exynos4_defconfig will be used for non-DT
for a while and we will try to move on using exynos_defconfig for only DT.
* samsung/defconfig:
ARM: exynos_defconfig: enable more platforms in defconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mv78xx0')
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/bridge-regs.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h index c64dbb96dbad..eb187e0e059b 100644 --- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h +++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h @@ -31,5 +31,6 @@ #define IRQ_MASK_HIGH_OFF 0x0014 #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) +#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300) #endif diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index 3674497162e3..e807c4c52a0b 100644 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -42,6 +42,7 @@ #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 #define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 +#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 #define MV78XX0_CORE_REGS_SIZE SZ_16K #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) @@ -59,6 +60,7 @@ * Core-specific peripheral registers. */ #define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) +#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE) /* * Register Map |