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author | Beniamino Galvani <b.galvani@gmail.com> | 2014-11-18 15:25:41 +0100 |
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committer | Carlo Caione <carlo@caione.org> | 2014-11-18 16:35:01 +0100 |
commit | 6a4ccd9a8e7cc2169b1c623d98d01201e9dcbacc (patch) | |
tree | 57f56c132d077c5a072ee7017e9287c937cce89c /arch/arm/mach-meson/meson.c | |
parent | a25a6772db05b252d9861b80b6387b67f69a8b8e (diff) |
ARM: meson: enable L2 cache
This enables the L2 cache controller available in Amlogic SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Diffstat (limited to 'arch/arm/mach-meson/meson.c')
-rw-r--r-- | arch/arm/mach-meson/meson.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-meson/meson.c b/arch/arm/mach-meson/meson.c index 8f42d8fbb505..5d6affe6a694 100644 --- a/arch/arm/mach-meson/meson.c +++ b/arch/arm/mach-meson/meson.c @@ -24,4 +24,6 @@ static const char * const meson_common_board_compat[] = { DT_MACHINE_START(MESON, "Amlogic Meson platform") .dt_compat = meson_common_board_compat, + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, MACHINE_END |