Merge tag 'soc2-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull part two of ARM SoC updates from Arnd Bergmann:
 "This is a small follow-up to the larger ARM SoC updates merged last
  week, almost entirely for the keystone platform.

  The main change here is to use the new dma-ranges parsing code that
  came in through Russell's ARM tree.  This allows the keystone platform
  to do cache-coherent DMA and to finally support all the available
  physical memory when LPAE is enabled.

  Aside from this, the keystone reset driver has been rewritten, and
  there is a small bug fix to allow building the orion5x platform again"

* tag 'soc2-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: keystone: Drop use of meminfo since its not available anymore
  ARM: orion5x: fix mvebu_mbus_dt_init call
  ARM: configs: keystone: enable reset driver support
  ARM: dts: keystone: update reset node to work with reset driver
  ARM: keystone: remove redundant reset stuff
  ARM: keystone: Update the dma offset for non-dt platform devices
  ARM: keystone: Switch over to coherent memory address space
  ARM: configs: keystone: add MTD_SPI_NOR (new dependency for M25P80)
  ARM: configs: keystone: drop CONFIG_COMMON_CLK_DEBUG

1 files changed, 17 insertions, 1 deletions

diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c
index 5cf0683577ea..5f46a7cf907b 100644
--- a/arch/arm/mach-keystone/platsmp.c
+++ b/arch/arm/mach-keystone/platsmp.c
@@ -17,13 +17,16 @@
 #include <linux/io.h>
 
 #include <asm/smp_plat.h>
+#include <asm/prom.h>
+#include <asm/tlbflush.h>
+#include <asm/pgtable.h>
 
 #include "keystone.h"
 
 static int keystone_smp_boot_secondary(unsigned int cpu,
 						struct task_struct *idle)
 {
-	unsigned long start = virt_to_phys(&secondary_startup);
+	unsigned long start = virt_to_idmap(&secondary_startup);
 	int error;
 
 	pr_debug("keystone-smp: booting cpu %d, vector %08lx\n",
@@ -36,6 +39,19 @@ static int keystone_smp_boot_secondary(unsigned int cpu,
 	return error;
 }
 
+#ifdef CONFIG_ARM_LPAE
+static void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu)
+{
+	pgd_t *pgd0 = pgd_offset_k(0);
+	cpu_set_ttbr(1, __pa(pgd0) + TTBR1_OFFSET);
+	local_flush_tlb_all();
+}
+#else
+static inline void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu)
+{}
+#endif
+
 struct smp_operations keystone_smp_ops __initdata = {
 	.smp_boot_secondary	= keystone_smp_boot_secondary,
+	.smp_secondary_init     = keystone_smp_secondary_initmem,
 };