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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2013-11-04 09:17:02 +0100
committerShawn Guo <shawn.guo@linaro.org>2013-12-09 13:18:25 +0800
commit81efe0fc67c72ca13eb402cc6de5c79f0f258932 (patch)
treea18c3792b71dbb2f19b156b10a236cf573242536 /arch/arm/mach-imx
parent5a269d22848777ad088e2d7883861cedc64972cf (diff)
ARM: imx: drop support for irq priorisation
The code for irq priorisation support doesn't have any in-tree users and the Kconfig description does wrong promises because nowadays irq handlers are called with irqs disabled, so no high prioritized irq can interrupt a lower prioritized handler. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/Kconfig10
-rw-r--r--arch/arm/mach-imx/avic.c25
-rw-r--r--arch/arm/mach-imx/irq-common.h1
3 files changed, 0 insertions, 36 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 15c9ae368b58..94317294b41e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -20,16 +20,6 @@ config ARCH_MXC
menu "Freescale i.MX support"
depends on ARCH_MXC
-config MXC_IRQ_PRIOR
- bool "Use IRQ priority"
- help
- Select this if you want to use prioritized IRQ handling.
- This feature prevents higher priority ISR to be interrupted
- by lower priority IRQ.
- This may be useful in embedded applications, where are strong
- requirements for timing.
- Say N here, unless you have a specialized requirement.
-
config MXC_TZIC
bool
diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c
index e163ec7a8441..8d1df2e4b7ac 100644
--- a/arch/arm/mach-imx/avic.c
+++ b/arch/arm/mach-imx/avic.c
@@ -54,28 +54,6 @@
static void __iomem *avic_base;
static struct irq_domain *domain;
-#ifdef CONFIG_MXC_IRQ_PRIOR
-static int avic_irq_set_priority(unsigned char irq, unsigned char prio)
-{
- struct irq_data *d = irq_get_irq_data(irq);
- unsigned int temp;
- unsigned int mask = 0x0F << irq % 8 * 4;
-
- irq = d->hwirq;
-
- if (irq >= AVIC_NUM_IRQS)
- return -EINVAL;
-
- temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8));
- temp &= ~mask;
- temp |= prio & mask;
-
- __raw_writel(temp, avic_base + AVIC_NIPRIORITY(irq / 8));
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_FIQ
static int avic_set_irq_fiq(unsigned int irq, unsigned int type)
{
@@ -102,9 +80,6 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type)
static struct mxc_extra_irq avic_extra_irq = {
-#ifdef CONFIG_MXC_IRQ_PRIOR
- .set_priority = avic_irq_set_priority,
-#endif
#ifdef CONFIG_FIQ
.set_irq_fiq = avic_set_irq_fiq,
#endif
diff --git a/arch/arm/mach-imx/irq-common.h b/arch/arm/mach-imx/irq-common.h
index 5b2dabba330f..6e3175dc0c0a 100644
--- a/arch/arm/mach-imx/irq-common.h
+++ b/arch/arm/mach-imx/irq-common.h
@@ -24,7 +24,6 @@
struct mxc_extra_irq
{
- int (*set_priority)(unsigned char irq, unsigned char prio);
int (*set_irq_fiq)(unsigned int irq, unsigned int type);
};