diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-07-11 12:50:42 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-07-11 12:50:42 +0200 |
| commit | 04cf794165786a8e850c7f1e755a222148b0e377 (patch) | |
| tree | eec33195f0968ed7090003466e7f5cb28017043c /arch/arm/mach-imx/ehci-imx35.c | |
| parent | 0dc19510430b20b3b2d6d1b9b796fd42fa2af64a (diff) | |
| parent | 0b87c1d4be230d109effe8aef78728160800e67f (diff) | |
Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
From Sascha Hauer <s.hauer@pengutronix.de>:
ARM i.MX SoC updates for 3.6
* tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: imx: fix mx51 ehci setup errors
ARM: imx: make ehci power/oc polarities configurable
ARM: imx: add rtc support to mx35_3ds
ARM: imx: enable support for mx35 rtc
ARM: imx: fix i.MX35 CPU architecture
ARM: i.MX51 iomux: added missing pin definitions
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/ehci-imx35.c')
| -rw-r--r-- | arch/arm/mach-imx/ehci-imx35.c | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c index 001ec3971f5d..73574c30cf50 100644 --- a/arch/arm/mach-imx/ehci-imx35.c +++ b/arch/arm/mach-imx/ehci-imx35.c @@ -24,14 +24,18 @@ #define MX35_OTG_SIC_SHIFT 29 #define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT) #define MX35_OTG_PM_BIT (1 << 24) +#define MX35_OTG_PP_BIT (1 << 11) +#define MX35_OTG_OCPOL_BIT (1 << 3) #define MX35_H1_SIC_SHIFT 21 #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) +#define MX35_H1_PP_BIT (1 << 18) #define MX35_H1_PM_BIT (1 << 8) #define MX35_H1_IPPUE_UP_BIT (1 << 7) #define MX35_H1_IPPUE_DOWN_BIT (1 << 6) #define MX35_H1_TLL_BIT (1 << 5) #define MX35_H1_USBTE_BIT (1 << 4) +#define MX35_H1_OCPOL_BIT (1 << 2) int mx35_initialize_usb_hw(int port, unsigned int flags) { @@ -41,21 +45,35 @@ int mx35_initialize_usb_hw(int port, unsigned int flags) switch (port) { case 0: /* OTG port */ - v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT); + v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT | MX35_OTG_PP_BIT | + MX35_OTG_OCPOL_BIT); v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT; if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) v |= MX35_OTG_PM_BIT; + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MX35_OTG_PP_BIT; + + if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)) + v |= MX35_OTG_OCPOL_BIT; + break; case 1: /* H1 port */ - v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT | - MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT); + v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_PP_BIT | + MX35_H1_OCPOL_BIT | MX35_H1_TLL_BIT | MX35_H1_USBTE_BIT | + MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT); v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT; if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) v |= MX35_H1_PM_BIT; + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MX35_H1_PP_BIT; + + if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)) + v |= MX35_H1_OCPOL_BIT; + if (!(flags & MXC_EHCI_TTL_ENABLED)) v |= MX35_H1_TLL_BIT; |