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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-07-03 15:58:49 +0200
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-08-25 16:02:26 +0200
commit8d248f0d3a1ddb3c671b4029f8950fbad09be7ae (patch)
treeac57e82af0222496cf5c6e993b85861a25fdd9e8 /arch/arm/mach-at91
parent9e8be232b934418932e40da276f6871dce83fa7c (diff)
ARM: at91: Rework ramc mapping code
Adapt the ramc mapping code to handle multiple ram controllers in the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/setup.c26
1 files changed, 14 insertions, 12 deletions
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index c565572157db..0c8daf7a4a77 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -395,24 +395,26 @@ static void at91_dt_ramc(void)
{
struct device_node *np;
const struct of_device_id *of_id;
+ int idx = 0;
- np = of_find_matching_node(NULL, ramc_ids);
- if (!np)
- panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
+ for_each_matching_node(np, ramc_ids) {
+ at91_ramc_base[idx] = of_iomap(np, 0);
+ if (!at91_ramc_base[idx])
+ panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
- at91_ramc_base[0] = of_iomap(np, 0);
- if (!at91_ramc_base[0])
- panic(pr_fmt("unable to map ramc[0] cpu registers\n"));
- /* the controller may have 2 banks */
- at91_ramc_base[1] = of_iomap(np, 1);
+ idx++;
+ }
+
+ if (!idx)
+ panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
of_id = of_match_node(ramc_ids, np);
- if (!of_id)
+ if (!of_id) {
pr_warn("ramc no standby function available\n");
- else
- at91_pm_set_standby(of_id->data);
+ return;
+ }
- of_node_put(np);
+ at91_pm_set_standby(of_id->data);
}
static struct of_device_id shdwc_ids[] = {